net/mlx5: Accel, Add TLS tx offload interface
authorIlya Lesokhin <ilyal@mellanox.com>
Mon, 30 Apr 2018 07:16:18 +0000 (10:16 +0300)
committerDavid S. Miller <davem@davemloft.net>
Tue, 1 May 2018 13:42:47 +0000 (09:42 -0400)
commit1ae1732284895498b7119e42323cf12821423e6d
tree92a93ca6e6375a1401e29fec44348892ebaecb65
parentbb9094161b2320e431a5d8a7b9c3dc632bc92ae6
net/mlx5: Accel, Add TLS tx offload interface

Add routines for manipulating TLS TX offload contexts.

In Innova TLS, TLS contexts are added or deleted
via a command message over the SBU connection.
The HW then sends a response message over the same connection.

Add implementation for Innova TLS (FPGA-based) hardware.

These routines will be used by the TLS offload support in a later patch

mlx5/accel is a middle acceleration layer to allow mlx5e and other ULPs
to work directly with mlx5_core rather than Innova FPGA or other mlx5
acceleration providers.

In the future, when IPSec/TLS or any other acceleration gets integrated
into ConnectX chip, mlx5/accel layer will provide the integrated
acceleration, rather than the Innova one.

Signed-off-by: Ilya Lesokhin <ilyal@mellanox.com>
Signed-off-by: Boris Pismenny <borisp@mellanox.com>
Acked-by: Saeed Mahameed <saeedm@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/mellanox/mlx5/core/Makefile
drivers/net/ethernet/mellanox/mlx5/core/accel/tls.c [new file with mode: 0644]
drivers/net/ethernet/mellanox/mlx5/core/accel/tls.h [new file with mode: 0644]
drivers/net/ethernet/mellanox/mlx5/core/fpga/core.h
drivers/net/ethernet/mellanox/mlx5/core/fpga/tls.c [new file with mode: 0644]
drivers/net/ethernet/mellanox/mlx5/core/fpga/tls.h [new file with mode: 0644]
drivers/net/ethernet/mellanox/mlx5/core/main.c
include/linux/mlx5/mlx5_ifc.h
include/linux/mlx5/mlx5_ifc_fpga.h