PCI: tegra: Add SW fixup for RAW violations
authorManikanta Maddireddy <mmaddireddy@nvidia.com>
Tue, 18 Jun 2019 18:01:53 +0000 (23:31 +0530)
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Thu, 20 Jun 2019 16:21:52 +0000 (17:21 +0100)
commit191cd6fb5d2cf184a3010c55ca290b2fe5a3d727
tree121decbd866a967b8608bafe2a3cd5bda1a2b6a5
parentb2634cd0d26d2431f065e06e30069ce11a081755
PCI: tegra: Add SW fixup for RAW violations

The logic which blocks read requests till AFI gets ACK for all outstanding
writes from memory controller does not behave correctly when number of
outstanding writes become more than 32 in Tegra124 and Tegra132.

SW fixup is to prevent writes from accumulating more than 32 by:

- limiting outstanding posted writes to 14
- modifying Gen1 and Gen2 UpdateFC timer frequency

UpdateFC timer frequency is equal to twice the value of register content
in nsec. These settings are recommended after stress testing with
different values.

Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Thierry Reding <treding@nvidia.com>
drivers/pci/controller/pci-tegra.c