stmmac: extend CSR Clock Range programming
authorGiuseppe CAVALLARO <peppe.cavallaro@st.com>
Wed, 4 Apr 2012 04:33:26 +0000 (04:33 +0000)
committerDavid S. Miller <davem@davemloft.net>
Wed, 4 Apr 2012 22:39:24 +0000 (18:39 -0400)
commit18f05d64ec36e27892cc0f55be707762aae053a1
tree2800ef8ec49ef318ffe16b93db4b15cebc1f39ca
parentba1377ffe90a04d9a1d526067909d24e3cf7a3f7
stmmac: extend CSR Clock Range programming

The CSR Clock Range has been reworked and new macros has
been added in the platform header to allow the CSR Clock
Range selection in the GMII Address Register.
The previous work didn't add the other fields
that can be used to achieve MDC clock of frequency
higher than the IEEE 802.3 specified frequency limit
of 2.5 MHz and program a clock divider of lower value.
On such platforms, these are used indeed so this patch
adds them.

Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
include/linux/stmmac.h