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(parent: f3af365) | patch
usb: dwc3: core: define bit 10 of GCTL register
authorFelipe Balbi <balbi@ti.com>
Tue, 25 Feb 2014 20:08:51 +0000 (14:08 -0600)
committerFelipe Balbi <balbi@ti.com>
Wed, 5 Mar 2014 15:44:49 +0000 (09:44 -0600)
commit183ca11179f6d3b99e0431bae6acb84350b82dea
treea3903014d73ad0ff925809dd34c42acc9de4f8catree | snapshot
parentf3af36511e60669a2b5644d17378c7ea4e42d8b1commit | diff
usb: dwc3: core: define bit 10 of GCTL register

This bit is necessary for implemeting workaround
for known issue with some revisions of this core.

Signed-off-by: Felipe Balbi <balbi@ti.com>
drivers/usb/dwc3/core.h diff | blob | history
John Crispins staging tree