projects / openwrt / staging / blogic.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: d71c771) | patch
rtc: ds2404: set range
authorAlexandre Belloni <alexandre.belloni@bootlin.com>
Fri, 19 Apr 2019 08:24:56 +0000 (10:24 +0200)
committerAlexandre Belloni <alexandre.belloni@bootlin.com>
Fri, 19 Apr 2019 20:37:16 +0000 (22:37 +0200)
commit13bfa942254f0894f22bcbfccee3480df1bfd89d
tree5169c4af60557f5242e709445183bcff209fce70tree | snapshot
parentd71c7715326b561e5b11768e8146f46287d1edd8commit | diff
rtc: ds2404: set range

The real-time clock is a 5-byte binary counter. It is incremented 256 times
per second. The least significant byte is a count of fractional seconds.
The upper four bytes are a count of seconds. The realtime clock can
accumulate 136 years of seconds before rolling over.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
drivers/rtc/rtc-ds2404.c diff | blob | history
John Crispins staging tree