pwm: lpc18xx-sct: Test clock rate to avoid division by 0
authorWolfram Sang <wsa+renesas@sang-engineering.com>
Wed, 2 Mar 2016 22:57:09 +0000 (23:57 +0100)
committerThierry Reding <thierry.reding@gmail.com>
Wed, 23 Mar 2016 16:11:29 +0000 (17:11 +0100)
commit0e47b5981a30e856c9c4aba785890528486d1594
tree346bdb50ebdc9bbfc02a93ed2a18012f2b73e10d
parentbea307c16a3a297f87c7ab9a54de686da2afbad5
pwm: lpc18xx-sct: Test clock rate to avoid division by 0

The clk API may return 0 on clk_get_rate(), so we should check the
result before using it as a divisor.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
drivers/pwm/pwm-lpc18xx-sct.c