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ARM: 7854/1: lockref: add support for lockless lockrefs using cmpxchg64
authorWill Deacon <will.deacon@arm.com>
Wed, 9 Oct 2013 16:19:22 +0000 (17:19 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Tue, 29 Oct 2013 11:06:11 +0000 (11:06 +0000)
commit0cbad9c9dfe0c38e8ec7385b39087c005a6dee3e
treec835625cbf2eb478134713fe1df99ca5e4e9bbf3tree | snapshot
parent775ebcc16b940ebf61bf54d6054a5e639f68b9d6commit | diff
ARM: 7854/1: lockref: add support for lockless lockrefs using cmpxchg64

Our spinlocks are only 32-bit (2x16-bit tickets) and, on processors
with 64-bit atomic instructions, cmpxchg64 makes use of the double-word
exclusive accessors.

This patch wires up the cmpxchg-based lockless lockref implementation
for ARM.

Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/Kconfig diff | blob | history
arch/arm/include/asm/spinlock.h diff | blob | history
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