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(parent: d17eb57) | patch
armv8: fsl-lsch3: add clock support for the second eSDHC
authorYangbo Lu <yangbo.lu@nxp.com>
Thu, 23 May 2019 03:05:45 +0000 (11:05 +0800)
committerPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Wed, 19 Jun 2019 07:24:56 +0000 (12:54 +0530)
commit087bfe67ac2555c37b257335424b7c193d7f6afd
tree9b302a808543434d4457483f27f63caf97d1a5betree | snapshot
parentd17eb57dcf4cc6b2624327563d85fb8e99a0ae4fcommit | diff
armv8: fsl-lsch3: add clock support for the second eSDHC

Layerscape began to use two eSDHC controllers, for example,
LS1028A. They are same IP block with same reference clock.
This patch is to add clock support for the second eSDHC.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c diff | blob | history
arch/arm/include/asm/arch-fsl-layerscape/clock.h diff | blob | history
Broadcom-s U-Boot