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ar71xx: Fix header offset for newer WRT160NL models
authorGabor Juhos <juhosg@openwrt.org>
Tue, 31 May 2011 22:53:20 +0000 (22:53 +0000)
committerGabor Juhos <juhosg@openwrt.org>
Tue, 31 May 2011 22:53:20 +0000 (22:53 +0000)
commit0677e162481b9624760ed1f8ffa6f56a2ebe4fe9
tree230bd5763daf1ffbdf2e549a913292d97fbef4bdtree | snapshot
parentbe97e2a04325fe29fe4def34d728c262de727b4ccommit | diff
ar71xx: Fix header offset for newer WRT160NL models

Newer WRT160NLs have a flash chip with 4K erase blocks instead of 64K,
resulting in miscalculated partition sizes.
Since the actual sizes did not change, hardcode them to their current
sizes, and make sure they are at least one erase block big (in case Cisco
decides to start to use chips with 128K erase blocks).

Signed-off-by: Jonas Gorski <jonas.gorski+openwrt@gmail.com>
SVN-Revision: 27049
target/linux/ar71xx/files/drivers/mtd/wrt160nl_part.c diff | blob | history
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