igb: Fix lack of flush after register write and before delay
authorCarolyn Wyborny <carolyn.wyborny@intel.com>
Sat, 25 Jun 2011 13:18:12 +0000 (13:18 +0000)
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>
Tue, 12 Jul 2011 01:42:14 +0000 (18:42 -0700)
commit064b43304ed8ede8e13ff7b4338d09fd37bcffb1
tree97b35ed92004def709aef245e69810656397fbcf
parentd84e0bd7971eb8357c700151ee4e8e4101ee65fa
igb: Fix lack of flush after register write and before delay

Register writes followed by a delay are required to have a flush
before the delay in order to commit the values to the register.  Without
the flush, the code following the delay may not function correctly.

Reported-by: Tong Ho <tong.ho@ericsson.com>
Reported-by: Guenter Roeck <guenter.roeck@ericsson.com>
Signed-off-by: Carolyn Wyborny <carolyn.wyborny@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
drivers/net/igb/e1000_82575.c