drm/tegra: Fix ordering of cleanup code
authorThierry Reding <treding@nvidia.com>
Wed, 25 Sep 2019 11:26:59 +0000 (13:26 +0200)
committerThierry Reding <treding@nvidia.com>
Thu, 24 Oct 2019 16:41:55 +0000 (18:41 +0200)
commit051172e8c1ceef8749f19faacc1d3bef65d20d8d
tree24d4a10dabe182fe23c3c476dcd26d36993eb29b
parentf1f20eb9705566f861330f8da7e2f2a84dae46af
drm/tegra: Fix ordering of cleanup code

Commit Fixes: b9f8b09ce256 ("drm/tegra: Setup shared IOMMU domain after
initialization") changed the initialization order of the IOMMU related
bits but didn't update the cleanup path accordingly. This asymmetry can
cause failures during error recovery.

Fixes: b9f8b09ce256 ("drm/tegra: Setup shared IOMMU domain after initialization")
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Tested-by: Dmitry Osipenko <digetx@gmail.com>
drivers/gpu/drm/tegra/drm.c