drm/amd/display: fix mpcc assert condition
authorEric Yang <Eric.Yang2@amd.com>
Sat, 29 Jun 2019 20:02:37 +0000 (16:02 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 18 Jul 2019 19:27:26 +0000 (14:27 -0500)
commit0488a56465877a48596a874bc0f4f31d6fbf334e
tree5ab3b340207709ccbf3eda56b1654c8c094f8606
parentdcbb45b6eeedfbc3a087f4fa375c706adabd1ce0
drm/amd/display: fix mpcc assert condition

[Why]
In DCN2x asic, the MPCC status register definition changed, and
our logic for assert is incorrect. disabled is valid state,
where we should see idle and not busy, where as in not
disabled state, we should see not idle.

[How]
Change assert condition to be more sensible.

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c