fsl/ddr: Add erratum_a009942_check_cpo and clean related erratum
authorShengzhou Liu <Shengzhou.Liu@nxp.com>
Mon, 21 Nov 2016 03:36:48 +0000 (11:36 +0800)
committerYork Sun <york.sun@nxp.com>
Mon, 5 Dec 2016 16:31:45 +0000 (08:31 -0800)
commit02fb2761576be8096ebf1b3f961a2cdb21b422ae
tree70cd556e7498ef63f2d51519958cfc2994c73950
parent5a17b8b5dab8973089b7400d05f8503d56f29370
fsl/ddr: Add erratum_a009942_check_cpo and clean related erratum

- add additional function erratum_a009942_check_cpo to check if the
  board needs tuning CPO calibration for optimal setting.
- move ERRATUM_A009942(with revision to check cpo_sample option) from
  fsl_ddr_gen4.c to ctrl_regs.c for reuse on all DDR4/DDR3 parts.
- move ERRATUM_A008378 from fsl_ddr_gen4.c to ctrl_regs.c
- remove obsolete ERRATUM_A004934 which is replaced with ERRATUM_A009942.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
[YS: Replaced CONFIG_QEMU_E500 with CONFIG_ARCH_QEMU_E500]
Reviewed-by: York Sun <york.sun@nxp.com>
arch/arm/cpu/armv8/fsl-layerscape/cpu.c
arch/powerpc/cpu/mpc85xx/cpu_init.c
arch/powerpc/include/asm/config_mpc85xx.h
board/freescale/ls1021aqds/ls1021aqds.c
drivers/ddr/fsl/ctrl_regs.c
drivers/ddr/fsl/fsl_ddr_gen4.c
drivers/ddr/fsl/mpc85xx_ddr_gen3.c
include/fsl_ddr.h
include/fsl_ddr_sdram.h