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(parent: b67c540) | patch
mlxsw: reg: Add QoS Port DSCP to Priority Mapping Register
authorPetr Machata <petrm@mellanox.com>
Fri, 27 Jul 2018 12:26:57 +0000 (15:26 +0300)
committerDavid S. Miller <davem@davemloft.net>
Fri, 27 Jul 2018 20:17:50 +0000 (13:17 -0700)
commit02837d726721cbc87629741e6b2570580ce47fae
treefacf4e7d40187cc1af55fae1b15fe1d07fcfc03ctree | snapshot
parentb67c540b8a987e365dc548e5b2ddf023946e3d63commit | diff
mlxsw: reg: Add QoS Port DSCP to Priority Mapping Register

The QPDPM register controls the mapping from DSCP field to Switch
Priority for IP packets.

Signed-off-by: Petr Machata <petrm@mellanox.com>
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/mellanox/mlxsw/reg.h diff | blob | history
John Crispins staging tree