feea66713a08d508dd6834f4518db569b6b4639e
[openwrt/staging/jow.git] /
1 From e664a91ea54b3488d6c08dd82dac2af1239c3275 Mon Sep 17 00:00:00 2001
2 From: Dave Stevenson <dave.stevenson@raspberrypi.com>
3 Date: Thu, 2 Dec 2021 18:21:46 +0000
4 Subject: [PATCH] drm/vc4: dpi: Add option for inverting pixel clock
5 and output enable
6
7 DRM provides flags for inverting pixel clock and output enable
8 signals, but these were not mapped to the relevant registers.
9
10 Add those mappings.
11
12 Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
13 ---
14 drivers/gpu/drm/vc4/vc4_dpi.c | 89 ++++++++++++++++++++---------------
15 1 file changed, 51 insertions(+), 38 deletions(-)
16
17 --- a/drivers/gpu/drm/vc4/vc4_dpi.c
18 +++ b/drivers/gpu/drm/vc4/vc4_dpi.c
19 @@ -148,45 +148,58 @@ static void vc4_dpi_encoder_enable(struc
20 }
21 drm_connector_list_iter_end(&conn_iter);
22
23 - if (connector && connector->display_info.num_bus_formats) {
24 - u32 bus_format = connector->display_info.bus_formats[0];
25 + if (connector) {
26 + if (connector->display_info.num_bus_formats) {
27 + u32 bus_format = connector->display_info.bus_formats[0];
28
29 - switch (bus_format) {
30 - case MEDIA_BUS_FMT_RGB888_1X24:
31 - dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
32 - DPI_FORMAT);
33 - break;
34 - case MEDIA_BUS_FMT_BGR888_1X24:
35 - dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
36 - DPI_FORMAT);
37 - dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR, DPI_ORDER);
38 - break;
39 - case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
40 - dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_2,
41 - DPI_FORMAT);
42 - break;
43 - case MEDIA_BUS_FMT_BGR666_1X24_CPADHI:
44 - dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_2,
45 - DPI_FORMAT);
46 - dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR, DPI_ORDER);
47 - break;
48 - case MEDIA_BUS_FMT_RGB666_1X18:
49 - dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1,
50 - DPI_FORMAT);
51 - break;
52 - case MEDIA_BUS_FMT_BGR666_1X18:
53 - dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1,
54 - DPI_FORMAT);
55 - dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR, DPI_ORDER);
56 - break;
57 - case MEDIA_BUS_FMT_RGB565_1X16:
58 - dpi_c |= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_3,
59 - DPI_FORMAT);
60 - break;
61 - default:
62 - DRM_ERROR("Unknown media bus format %d\n", bus_format);
63 - break;
64 + switch (bus_format) {
65 + case MEDIA_BUS_FMT_RGB888_1X24:
66 + dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
67 + DPI_FORMAT);
68 + break;
69 + case MEDIA_BUS_FMT_BGR888_1X24:
70 + dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
71 + DPI_FORMAT);
72 + dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR,
73 + DPI_ORDER);
74 + break;
75 + case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
76 + dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_2,
77 + DPI_FORMAT);
78 + break;
79 + case MEDIA_BUS_FMT_BGR666_1X24_CPADHI:
80 + dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_2,
81 + DPI_FORMAT);
82 + dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR,
83 + DPI_ORDER);
84 + break;
85 + case MEDIA_BUS_FMT_RGB666_1X18:
86 + dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1,
87 + DPI_FORMAT);
88 + break;
89 + case MEDIA_BUS_FMT_BGR666_1X18:
90 + dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1,
91 + DPI_FORMAT);
92 + dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR,
93 + DPI_ORDER);
94 + break;
95 + case MEDIA_BUS_FMT_RGB565_1X16:
96 + dpi_c |= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_3,
97 + DPI_FORMAT);
98 + break;
99 + default:
100 + DRM_ERROR("Unknown media bus format %d\n",
101 + bus_format);
102 + break;
103 + }
104 }
105 +
106 + if (connector->display_info.bus_flags &
107 + DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE)
108 + dpi_c |= DPI_PIXEL_CLK_INVERT;
109 +
110 + if (connector->display_info.bus_flags & DRM_BUS_FLAG_DE_LOW)
111 + dpi_c |= DPI_OUTPUT_ENABLE_INVERT;
112 } else {
113 /* Default to 18bit if no connector found. */
114 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1, DPI_FORMAT);