f7c5d02c371c64947bab2188e7af52ace5b4520d
[openwrt/openwrt.git] /
1 From: Felix Fietkau <nbd@nbd.name>
2 Subject: [PATCH net-next 3/4] net: ethernet: mtk_eth_soc: reduce rx ring size for older chipsets
3 Date: Tue, 15 Oct 2024 13:09:37 +0200
4
5 Commit c57e55819443 ("net: ethernet: mtk_eth_soc: handle dma buffer
6 size soc specific") resolved some tx timeout issues by bumping FQ and
7 tx ring sizes from 512 to 2048 entries (the value used in the MediaTek
8 SDK), however it also changed the rx ring size for all chipsets in the
9 same way.
10
11 Based on a few tests, it seems that a symmetric rx/tx ring size of 2048
12 really only makes sense on MT7988, which is capable of 10G ethernet links.
13
14 Older chipsets are typically deployed in systems that are more memory
15 constrained and don't actually need the larger rings to handle received
16 packets.
17
18 In order to reduce wasted memory set the ring size based on the SoC to
19 the following values:
20 - 2048 on MT7988
21 - 1024 on MT7986
22 - 512 (previous value) on everything else, except:
23 - 256 on RT5350 (the oldest supported chipset)
24
25 Fixes: c57e55819443 ("net: ethernet: mtk_eth_soc: handle dma buffer size soc specific")
26 Signed-off-by: Felix Fietkau <nbd@nbd.name>
27 ---
28 drivers/net/ethernet/mediatek/mtk_eth_soc.c | 16 ++++++++--------
29 1 file changed, 8 insertions(+), 8 deletions(-)
30
31 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
32 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
33 @@ -5445,7 +5445,7 @@ static const struct mtk_soc_data mt2701_
34 .desc_size = sizeof(struct mtk_rx_dma),
35 .irq_done_mask = MTK_RX_DONE_INT,
36 .dma_l4_valid = RX_DMA_L4_VALID,
37 - .dma_size = MTK_DMA_SIZE(2K),
38 + .dma_size = MTK_DMA_SIZE(512),
39 .dma_max_len = MTK_TX_DMA_BUF_LEN,
40 .dma_len_offset = 16,
41 },
42 @@ -5473,7 +5473,7 @@ static const struct mtk_soc_data mt7621_
43 .desc_size = sizeof(struct mtk_rx_dma),
44 .irq_done_mask = MTK_RX_DONE_INT,
45 .dma_l4_valid = RX_DMA_L4_VALID,
46 - .dma_size = MTK_DMA_SIZE(2K),
47 + .dma_size = MTK_DMA_SIZE(512),
48 .dma_max_len = MTK_TX_DMA_BUF_LEN,
49 .dma_len_offset = 16,
50 },
51 @@ -5503,7 +5503,7 @@ static const struct mtk_soc_data mt7622_
52 .desc_size = sizeof(struct mtk_rx_dma),
53 .irq_done_mask = MTK_RX_DONE_INT,
54 .dma_l4_valid = RX_DMA_L4_VALID,
55 - .dma_size = MTK_DMA_SIZE(2K),
56 + .dma_size = MTK_DMA_SIZE(512),
57 .dma_max_len = MTK_TX_DMA_BUF_LEN,
58 .dma_len_offset = 16,
59 },
60 @@ -5532,7 +5532,7 @@ static const struct mtk_soc_data mt7623_
61 .desc_size = sizeof(struct mtk_rx_dma),
62 .irq_done_mask = MTK_RX_DONE_INT,
63 .dma_l4_valid = RX_DMA_L4_VALID,
64 - .dma_size = MTK_DMA_SIZE(2K),
65 + .dma_size = MTK_DMA_SIZE(512),
66 .dma_max_len = MTK_TX_DMA_BUF_LEN,
67 .dma_len_offset = 16,
68 },
69 @@ -5558,7 +5558,7 @@ static const struct mtk_soc_data mt7629_
70 .desc_size = sizeof(struct mtk_rx_dma),
71 .irq_done_mask = MTK_RX_DONE_INT,
72 .dma_l4_valid = RX_DMA_L4_VALID,
73 - .dma_size = MTK_DMA_SIZE(2K),
74 + .dma_size = MTK_DMA_SIZE(512),
75 .dma_max_len = MTK_TX_DMA_BUF_LEN,
76 .dma_len_offset = 16,
77 },
78 @@ -5590,7 +5590,7 @@ static const struct mtk_soc_data mt7981_
79 .dma_l4_valid = RX_DMA_L4_VALID_V2,
80 .dma_max_len = MTK_TX_DMA_BUF_LEN,
81 .dma_len_offset = 16,
82 - .dma_size = MTK_DMA_SIZE(2K),
83 + .dma_size = MTK_DMA_SIZE(512),
84 },
85 };
86
87 @@ -5620,7 +5620,7 @@ static const struct mtk_soc_data mt7986_
88 .dma_l4_valid = RX_DMA_L4_VALID_V2,
89 .dma_max_len = MTK_TX_DMA_BUF_LEN,
90 .dma_len_offset = 16,
91 - .dma_size = MTK_DMA_SIZE(2K),
92 + .dma_size = MTK_DMA_SIZE(1K),
93 },
94 };
95
96 @@ -5673,7 +5673,7 @@ static const struct mtk_soc_data rt5350_
97 .dma_l4_valid = RX_DMA_L4_VALID_PDMA,
98 .dma_max_len = MTK_TX_DMA_BUF_LEN,
99 .dma_len_offset = 16,
100 - .dma_size = MTK_DMA_SIZE(2K),
101 + .dma_size = MTK_DMA_SIZE(256),
102 },
103 };
104