git.openwrt.org Git - openwrt/staging/xback.git/blob

   1 From e73d889889d4795cc1640ec0a6f813bfe585b838 Mon Sep 17 00:00:00 2001
   2 From: Dom Cobley <popcornmix@gmail.com>
   3 Date: Thu, 4 May 2023 16:09:49 +0100
   4 Subject: [PATCH] bcm2711-rpi-ds: Switch to dma40 channel for hdmi
   5  audio
   6
   7 Also tweak the flags:
   8 Remove NO_WAIT_RESP (27)
   9 Add BURST_LENGTH (30)
  10
  11 The AXI path from DMA controller to HDMI audio fifo
  12 is long, and may have considerable delay.
  13
  14 When using DMA without waiting for responses it is
  15 very easy to overfill the fifo as when the fifo
  16 removes DREQ there may be large numbers of writes
  17 in flight.
  18
  19 This means the DREQ fifo threshold must be set low
  20 enough to accommodate the maximum number of in flight
  21 writes (unknown by something like 24),
  22 which means the 32 element fifo only requests data
  23 when it contains fewer than 8 entries, making it
  24 susceptable to underflow.
  25
  26 If we wait for write responses we can set the DREQ
  27 fifo threshold much higher as there are a controlled
  28 number of writes in flight.
  29
  30 However the overall bandwidth is reduced by setting
  31 this, so also enable a burstsize of 4 to improve
  32 bandwidth.
  33
  34 Signed-off-by: Dom Cobley <popcornmix@gmail.com>
  35 ---
  36  arch/arm/boot/dts/bcm2711-rpi-ds.dtsi | 4 ++--
  37  1 file changed, 2 insertions(+), 2 deletions(-)
  38
  39 --- a/arch/arm/boot/dts/bcm2711-rpi-ds.dtsi
  40 +++ b/arch/arm/boot/dts/bcm2711-rpi-ds.dtsi
  41 @@ -364,7 +364,7 @@
  42                  <&firmware_clocks 14>,
  43                  <&dvp 0>,
  44                  <&clk_27MHz>;
  45 -       dmas = <&dma (10|(1<<27)|(1<<24)|(10<<16)|(15<<20))>;
  46 +       dmas = <&dma40 (10|(1<<30)|(1<<24)|(10<<16)|(15<<20))>;
  47         status = "disabled";
  48  };
  49
  50 @@ -397,7 +397,7 @@
  51                  <&firmware_clocks 14>,
  52                  <&dvp 1>,
  53                  <&clk_27MHz>;
  54 -       dmas = <&dma (17|(1<<27)|(1<<24)|(10<<16)|(15<<20))>;
  55 +       dmas = <&dma40 (17|(1<<30)|(1<<24)|(10<<16)|(15<<20))>;
  56         status = "disabled";
  57  };
  58