git.openwrt.org Git - openwrt/staging/lynxis.git/blob

   1 From b9133f3ef5a2659730cf47a74bd0a9259f1cf8ff Mon Sep 17 00:00:00 2001
   2 From: Ansuel Smith <ansuelsmth@gmail.com>
   3 Date: Mon, 22 Nov 2021 16:23:40 +0100
   4 Subject: net: dsa: qca8k: remove redundant check in parse_port_config
   5
   6 The very next check for port 0 and 6 already makes sure we don't go out
   7 of bounds with the ports_config delay table.
   8 Remove the redundant check.
   9
  10 Reported-by: kernel test robot <lkp@intel.com>
  11 Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
  12 Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
  13 Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
  14 Signed-off-by: David S. Miller <davem@davemloft.net>
  15 ---
  16  drivers/net/dsa/qca8k.c | 2 +-
  17  1 file changed, 1 insertion(+), 1 deletion(-)
  18
  19 --- a/drivers/net/dsa/qca8k.c
  20 +++ b/drivers/net/dsa/qca8k.c
  21 @@ -983,7 +983,7 @@ qca8k_parse_port_config(struct qca8k_pri
  22         u32 delay;
  23
  24         /* We have 2 CPU port. Check them */
  25 -       for (port = 0; port < QCA8K_NUM_PORTS && cpu_port_index < QCA8K_NUM_CPU_PORTS; port++) {
  26 +       for (port = 0; port < QCA8K_NUM_PORTS; port++) {
  27                 /* Skip every other port */
  28                 if (port != 0 && port != 6)
  29                         continue;