git.openwrt.org Git - openwrt/staging/stintel.git/blob

   1 From fdedb695e6a8657302341cda81d519ef04f9acaa Mon Sep 17 00:00:00 2001
   2 From: Russell King <rmk+kernel@armlinux.org.uk>
   3 Date: Wed, 27 Oct 2021 10:03:43 +0100
   4 Subject: [PATCH] net: mvneta: populate supported_interfaces member
   5
   6 Populate the phy_interface_t bitmap for the Marvell mvneta driver with
   7 interfaces modes supported by the MAC.
   8
   9 Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
  10 Signed-off-by: David S. Miller <davem@davemloft.net>
  11 ---
  12  drivers/net/ethernet/marvell/mvneta.c | 25 +++++++++++++++++++++++++
  13  1 file changed, 25 insertions(+)
  14
  15 --- a/drivers/net/ethernet/marvell/mvneta.c
  16 +++ b/drivers/net/ethernet/marvell/mvneta.c
  17 @@ -5180,6 +5180,31 @@ static int mvneta_probe(struct platform_
  18
  19         pp->phylink_config.dev = &dev->dev;
  20         pp->phylink_config.type = PHYLINK_NETDEV;
  21 +       phy_interface_set_rgmii(pp->phylink_config.supported_interfaces);
  22 +       __set_bit(PHY_INTERFACE_MODE_QSGMII,
  23 +                 pp->phylink_config.supported_interfaces);
  24 +       if (comphy) {
  25 +               /* If a COMPHY is present, we can support any of the serdes
  26 +                * modes and switch between them.
  27 +                */
  28 +               __set_bit(PHY_INTERFACE_MODE_SGMII,
  29 +                         pp->phylink_config.supported_interfaces);
  30 +               __set_bit(PHY_INTERFACE_MODE_1000BASEX,
  31 +                         pp->phylink_config.supported_interfaces);
  32 +               __set_bit(PHY_INTERFACE_MODE_2500BASEX,
  33 +                         pp->phylink_config.supported_interfaces);
  34 +       } else if (phy_mode == PHY_INTERFACE_MODE_2500BASEX) {
  35 +               /* No COMPHY, with only 2500BASE-X mode supported */
  36 +               __set_bit(PHY_INTERFACE_MODE_2500BASEX,
  37 +                         pp->phylink_config.supported_interfaces);
  38 +       } else if (phy_mode == PHY_INTERFACE_MODE_1000BASEX ||
  39 +                  phy_mode == PHY_INTERFACE_MODE_SGMII) {
  40 +               /* No COMPHY, we can switch between 1000BASE-X and SGMII */
  41 +               __set_bit(PHY_INTERFACE_MODE_1000BASEX,
  42 +                         pp->phylink_config.supported_interfaces);
  43 +               __set_bit(PHY_INTERFACE_MODE_SGMII,
  44 +                         pp->phylink_config.supported_interfaces);
  45 +       }
  46
  47         phylink = phylink_create(&pp->phylink_config, pdev->dev.fwnode,
  48                                  phy_mode, &mvneta_phylink_ops);