git.openwrt.org Git - openwrt/staging/981213.git/blob

   1 From 7760958a0fb50b0e20f88e220f55798ec154c41e Mon Sep 17 00:00:00 2001
   2 From: Dave Stevenson <dave.stevenson@raspberrypi.com>
   3 Date: Sat, 8 Jan 2022 13:24:10 +0000
   4 Subject: [PATCH] drm/vc4: Add alpha_blend_mode property to each plane.
   5
   6 Move from only supporting the default of pre-multiplied
   7 alpha to supporting user specified blend mode using the
   8 standardised property.
   9
  10 Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
  11 ---
  12  drivers/gpu/drm/vc4/vc4_plane.c | 62 ++++++++++++++++++++++++++-------
  13  1 file changed, 49 insertions(+), 13 deletions(-)
  14
  15 --- a/drivers/gpu/drm/vc4/vc4_plane.c
  16 +++ b/drivers/gpu/drm/vc4/vc4_plane.c
  17 @@ -664,6 +664,48 @@ static const u32 colorspace_coeffs[2][DR
  18         }
  19  };
  20
  21 +static u32 vc4_hvs4_get_alpha_blend_mode(struct drm_plane_state *state)
  22 +{
  23 +       if (!state->fb->format->has_alpha)
  24 +               return VC4_SET_FIELD(SCALER_POS2_ALPHA_MODE_FIXED,
  25 +                                    SCALER_POS2_ALPHA_MODE);
  26 +
  27 +       switch (state->pixel_blend_mode) {
  28 +       case DRM_MODE_BLEND_PIXEL_NONE:
  29 +               return VC4_SET_FIELD(SCALER_POS2_ALPHA_MODE_FIXED,
  30 +                                    SCALER_POS2_ALPHA_MODE);
  31 +       default:
  32 +       case DRM_MODE_BLEND_PREMULTI:
  33 +               return VC4_SET_FIELD(SCALER_POS2_ALPHA_MODE_PIPELINE,
  34 +                                    SCALER_POS2_ALPHA_MODE) |
  35 +                       SCALER_POS2_ALPHA_PREMULT;
  36 +       case DRM_MODE_BLEND_COVERAGE:
  37 +               return VC4_SET_FIELD(SCALER_POS2_ALPHA_MODE_PIPELINE,
  38 +                                    SCALER_POS2_ALPHA_MODE);
  39 +       }
  40 +}
  41 +
  42 +static u32 vc4_hvs5_get_alpha_blend_mode(struct drm_plane_state *state)
  43 +{
  44 +       if (!state->fb->format->has_alpha)
  45 +               return VC4_SET_FIELD(SCALER5_CTL2_ALPHA_MODE_FIXED,
  46 +                                    SCALER5_CTL2_ALPHA_MODE);
  47 +
  48 +       switch (state->pixel_blend_mode) {
  49 +       case DRM_MODE_BLEND_PIXEL_NONE:
  50 +               return VC4_SET_FIELD(SCALER5_CTL2_ALPHA_MODE_FIXED,
  51 +                                    SCALER5_CTL2_ALPHA_MODE);
  52 +       default:
  53 +       case DRM_MODE_BLEND_PREMULTI:
  54 +               return VC4_SET_FIELD(SCALER5_CTL2_ALPHA_MODE_PIPELINE,
  55 +                                    SCALER5_CTL2_ALPHA_MODE) |
  56 +                       SCALER5_CTL2_ALPHA_PREMULT;
  57 +       case DRM_MODE_BLEND_COVERAGE:
  58 +               return VC4_SET_FIELD(SCALER5_CTL2_ALPHA_MODE_PIPELINE,
  59 +                                    SCALER5_CTL2_ALPHA_MODE);
  60 +       }
  61 +}
  62 +
  63  /* Writes out a full display list for an active plane to the plane's
  64   * private dlist state.
  65   */
  66 @@ -946,13 +988,8 @@ static int vc4_plane_mode_set(struct drm
  67                 /* Position Word 2: Source Image Size, Alpha */
  68                 vc4_state->pos2_offset = vc4_state->dlist_count;
  69                 vc4_dlist_write(vc4_state,
  70 -                               VC4_SET_FIELD(fb->format->has_alpha ?
  71 -                                             SCALER_POS2_ALPHA_MODE_PIPELINE :
  72 -                                             SCALER_POS2_ALPHA_MODE_FIXED,
  73 -                                             SCALER_POS2_ALPHA_MODE) |
  74                                 (mix_plane_alpha ? SCALER_POS2_ALPHA_MIX : 0) |
  75 -                               (fb->format->has_alpha ?
  76 -                                               SCALER_POS2_ALPHA_PREMULT : 0) |
  77 +                               vc4_hvs4_get_alpha_blend_mode(state) |
  78                                 VC4_SET_FIELD(vc4_state->src_w[0],
  79                                               SCALER_POS2_WIDTH) |
  80                                 VC4_SET_FIELD(vc4_state->src_h[0],
  81 @@ -997,14 +1034,9 @@ static int vc4_plane_mode_set(struct drm
  82                 vc4_dlist_write(vc4_state,
  83                                 VC4_SET_FIELD(state->alpha >> 4,
  84                                               SCALER5_CTL2_ALPHA) |
  85 -                               (fb->format->has_alpha ?
  86 -                                       SCALER5_CTL2_ALPHA_PREMULT : 0) |
  87 +                               vc4_hvs5_get_alpha_blend_mode(state) |
  88                                 (mix_plane_alpha ?
  89 -                                       SCALER5_CTL2_ALPHA_MIX : 0) |
  90 -                               VC4_SET_FIELD(fb->format->has_alpha ?
  91 -                                     SCALER5_CTL2_ALPHA_MODE_PIPELINE :
  92 -                                     SCALER5_CTL2_ALPHA_MODE_FIXED,
  93 -                                     SCALER5_CTL2_ALPHA_MODE)
  94 +                                       SCALER5_CTL2_ALPHA_MIX : 0)
  95                                );
  96
  97                 /* Position Word 1: Scaled Image Dimensions. */
  98 @@ -1494,6 +1526,10 @@ struct drm_plane *vc4_plane_init(struct
  99         drm_plane_helper_add(plane, &vc4_plane_helper_funcs);
 100
 101         drm_plane_create_alpha_property(plane);
 102 +       drm_plane_create_blend_mode_property(plane,
 103 +                                            BIT(DRM_MODE_BLEND_PIXEL_NONE) |
 104 +                                            BIT(DRM_MODE_BLEND_PREMULTI) |
 105 +                                            BIT(DRM_MODE_BLEND_COVERAGE));
 106         drm_plane_create_rotation_property(plane, DRM_MODE_ROTATE_0,
 107                                            DRM_MODE_ROTATE_0 |
 108                                            DRM_MODE_ROTATE_180 |