git.openwrt.org Git - openwrt/staging/mans0n.git/blob

   1 From b4a308dd31a7c6754be230849a5e430052268b9c Mon Sep 17 00:00:00 2001
   2 From: Weijie Gao <weijie.gao@mediatek.com>
   3 Date: Wed, 19 Jul 2023 17:16:33 +0800
   4 Subject: [PATCH 11/29] reset: mediatek: add reset definition for MediaTek
   5  MT7988 SoC
   6
   7 This patch adds reset bits for MediaTek MT7988
   8
   9 Signed-off-by: Sam Shih <sam.shih@mediatek.com>
  10 Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  11 ---
  12  include/dt-bindings/reset/mt7988-reset.h | 31 ++++++++++++++++++++++++
  13  1 file changed, 31 insertions(+)
  14  create mode 100644 include/dt-bindings/reset/mt7988-reset.h
  15
  16 --- /dev/null
  17 +++ b/include/dt-bindings/reset/mt7988-reset.h
  18 @@ -0,0 +1,31 @@
  19 +/* SPDX-License-Identifier: GPL-2.0 */
  20 +/*
  21 + * Copyright (C) 2023 MediaTek Inc.
  22 + */
  23 +
  24 +#ifndef _DT_BINDINGS_MTK_RESET_H_
  25 +#define _DT_BINDINGS_MTK_RESET_H_
  26 +
  27 +/* ETHDMA Subsystem resets */
  28 +#define ETHDMA_FE_RST                  6
  29 +#define ETHDMA_PMTR_RST                        8
  30 +#define ETHDMA_GMAC_RST                        23
  31 +#define ETHDMA_WDMA0_RST               24
  32 +#define ETHDMA_WDMA1_RST               25
  33 +#define ETHDMA_WDMA2_RST               26
  34 +#define ETHDMA_PPE0_RST                        29
  35 +#define ETHDMA_PPE1_RST                        30
  36 +#define ETHDMA_PPE2_RST                        31
  37 +
  38 +/* ETHWARP Subsystem resets */
  39 +#define ETHWARP_GSW_RST                        9
  40 +#define ETHWARP_EIP197_RST             10
  41 +#define ETHWARP_WOCPU0_RST             32
  42 +#define ETHWARP_WOCPU1_RST             33
  43 +#define ETHWARP_WOCPU2_RST             34
  44 +#define ETHWARP_WOX_NET_MUX_RST                35
  45 +#define ETHWARP_WED0_RST               36
  46 +#define ETHWARP_WED1_RST               37
  47 +#define ETHWARP_WED2_RST               38
  48 +
  49 +#endif /* _DT_BINDINGS_MTK_RESET_H_ */