ec8485e0a74370b8bc94435ceff9444bf8f2c7d0
[openwrt/staging/ansuel.git] /
1 From 7de26bf144f6a72858ab60afb2bd2b43265ee0ad Mon Sep 17 00:00:00 2001
2 From: Sean Anderson <sean.anderson@seco.com>
3 Date: Tue, 20 Sep 2022 18:12:34 -0400
4 Subject: [PATCH] net: phy: aquantia: Add some additional phy interfaces
5
6 These are documented in the AQR115 register reference. I haven't tested
7 them, but perhaps they'll be useful to someone.
8
9 Signed-off-by: Sean Anderson <sean.anderson@seco.com>
10 Reviewed-by: Andrew Lunn <andrew@lunn.ch>
11 Signed-off-by: David S. Miller <davem@davemloft.net>
12 ---
13 drivers/net/phy/aquantia_main.c | 17 ++++++++++++++++-
14 1 file changed, 16 insertions(+), 1 deletion(-)
15
16 --- a/drivers/net/phy/aquantia_main.c
17 +++ b/drivers/net/phy/aquantia_main.c
18 @@ -27,9 +27,12 @@
19 #define MDIO_PHYXS_VEND_IF_STATUS 0xe812
20 #define MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK GENMASK(7, 3)
21 #define MDIO_PHYXS_VEND_IF_STATUS_TYPE_KR 0
22 +#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_KX 1
23 #define MDIO_PHYXS_VEND_IF_STATUS_TYPE_XFI 2
24 #define MDIO_PHYXS_VEND_IF_STATUS_TYPE_USXGMII 3
25 +#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_XAUI 4
26 #define MDIO_PHYXS_VEND_IF_STATUS_TYPE_SGMII 6
27 +#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_RXAUI 7
28 #define MDIO_PHYXS_VEND_IF_STATUS_TYPE_OCSGMII 10
29
30 #define MDIO_AN_VEND_PROV 0xc400
31 @@ -401,15 +404,24 @@ static int aqr107_read_status(struct phy
32 case MDIO_PHYXS_VEND_IF_STATUS_TYPE_KR:
33 phydev->interface = PHY_INTERFACE_MODE_10GKR;
34 break;
35 + case MDIO_PHYXS_VEND_IF_STATUS_TYPE_KX:
36 + phydev->interface = PHY_INTERFACE_MODE_1000BASEKX;
37 + break;
38 case MDIO_PHYXS_VEND_IF_STATUS_TYPE_XFI:
39 phydev->interface = PHY_INTERFACE_MODE_10GBASER;
40 break;
41 case MDIO_PHYXS_VEND_IF_STATUS_TYPE_USXGMII:
42 phydev->interface = PHY_INTERFACE_MODE_USXGMII;
43 break;
44 + case MDIO_PHYXS_VEND_IF_STATUS_TYPE_XAUI:
45 + phydev->interface = PHY_INTERFACE_MODE_XAUI;
46 + break;
47 case MDIO_PHYXS_VEND_IF_STATUS_TYPE_SGMII:
48 phydev->interface = PHY_INTERFACE_MODE_SGMII;
49 break;
50 + case MDIO_PHYXS_VEND_IF_STATUS_TYPE_RXAUI:
51 + phydev->interface = PHY_INTERFACE_MODE_RXAUI;
52 + break;
53 case MDIO_PHYXS_VEND_IF_STATUS_TYPE_OCSGMII:
54 phydev->interface = PHY_INTERFACE_MODE_2500BASEX;
55 break;
56 @@ -522,11 +534,14 @@ static int aqr107_config_init(struct phy
57
58 /* Check that the PHY interface type is compatible */
59 if (phydev->interface != PHY_INTERFACE_MODE_SGMII &&
60 + phydev->interface != PHY_INTERFACE_MODE_1000BASEKX &&
61 phydev->interface != PHY_INTERFACE_MODE_2500BASEX &&
62 phydev->interface != PHY_INTERFACE_MODE_XGMII &&
63 phydev->interface != PHY_INTERFACE_MODE_USXGMII &&
64 phydev->interface != PHY_INTERFACE_MODE_10GKR &&
65 - phydev->interface != PHY_INTERFACE_MODE_10GBASER)
66 + phydev->interface != PHY_INTERFACE_MODE_10GBASER &&
67 + phydev->interface != PHY_INTERFACE_MODE_XAUI &&
68 + phydev->interface != PHY_INTERFACE_MODE_RXAUI)
69 return -ENODEV;
70
71 WARN(phydev->interface == PHY_INTERFACE_MODE_XGMII,