git.openwrt.org Git - openwrt/staging/neocturne.git/blob

   1 From 31f17073ffb1501574ad4cb8dffd507dee40e69a Mon Sep 17 00:00:00 2001
   2 From: Abhimanyu Saini <abhimanyu.saini@nxp.com>
   3 Date: Thu, 16 Jun 2016 13:49:17 +0530
   4 Subject: [PATCH 64/93] board: freescale: ls1012a: Intergrate and enable PPA
   5  on LS1012ARDB
   6
   7 Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
   8 Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
   9 ---
  10  board/freescale/ls1012ardb/ls1012ardb.c |   10 ++++++++++
  11  include/configs/ls1012ardb.h            |    9 +++++++++
  12  2 files changed, 19 insertions(+)
  13
  14 diff --git a/board/freescale/ls1012ardb/ls1012ardb.c b/board/freescale/ls1012ardb/ls1012ardb.c
  15 index 8340f14..7f7503c 100644
  16 --- a/board/freescale/ls1012ardb/ls1012ardb.c
  17 +++ b/board/freescale/ls1012ardb/ls1012ardb.c
  18 @@ -198,6 +198,9 @@ int mmc_check_sdhc2_card(void)
  19  int board_init(void)
  20  {
  21         struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
  22 +#ifdef CONFIG_FSL_LS_PPA
  23 +       u64 ppa_entry;
  24 +#endif
  25         /*
  26          * Set CCI-400 control override register to enable barrier
  27          * transaction
  28 @@ -216,6 +219,13 @@ int board_init(void)
  29         sec_init();
  30  #endif
  31
  32 +#ifdef CONFIG_FSL_LS_PPA
  33 +       ppa_init_pre(&ppa_entry);
  34 +
  35 +       if (ppa_entry)
  36 +               ppa_init_entry((void *)ppa_entry);
  37 +#endif
  38 +
  39         return 0;
  40  }
  41
  42 diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h
  43 index f6b3f28..fdaea3e 100644
  44 --- a/include/configs/ls1012ardb.h
  45 +++ b/include/configs/ls1012ardb.h
  46 @@ -9,6 +9,15 @@
  47
  48  #include "ls1012a_common.h"
  49
  50 +#define CONFIG_FSL_LS_PPA
  51 +#if defined(CONFIG_FSL_LS_PPA)
  52 +#define CONFIG_SYS_LS_PPA_DRAM_BLOCK_MIN_SIZE          (1UL * 1024 * 1024)
  53 +
  54 +#define CONFIG_SYS_LS_PPA_FW_IN_XIP
  55 +#ifdef CONFIG_SYS_LS_PPA_FW_IN_XIP
  56 +#define        CONFIG_SYS_LS_PPA_FW_ADDR       0x40500000
  57 +#endif
  58 +#endif
  59
  60  #define CONFIG_DIMM_SLOTS_PER_CTLR     1
  61  #define CONFIG_CHIP_SELECTS_PER_CTRL   1
  62 --
  63 1.7.9.5
  64