e75a9c027c416acc6e33af84a852ea53315c7526
[openwrt/staging/stintel.git] /
1 From cf3e71b3c8bd63cd832c0512386700cac6a2c363 Mon Sep 17 00:00:00 2001
2 From: Luo Jie <quic_luoj@quicinc.com>
3 Date: Tue, 5 Mar 2024 16:42:56 +0800
4 Subject: [PATCH 35/50] net: ethernet: qualcomm: Add API to configure PPE port
5 max frame size
6
7 This function is called when the MTU of an ethernet port is
8 configured. It limits the size of packet passed through the
9 ethernet port.
10
11 Change-Id: I2a4dcd04407156d73770d2becbb7cbc0d56b3754
12 Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
13 ---
14 drivers/net/ethernet/qualcomm/ppe/ppe_port.c | 44 ++++++++++++++++++++
15 drivers/net/ethernet/qualcomm/ppe/ppe_port.h | 1 +
16 2 files changed, 45 insertions(+)
17
18 diff --git a/drivers/net/ethernet/qualcomm/ppe/ppe_port.c b/drivers/net/ethernet/qualcomm/ppe/ppe_port.c
19 index a9781e1197f7..52820e2eedf8 100644
20 --- a/drivers/net/ethernet/qualcomm/ppe/ppe_port.c
21 +++ b/drivers/net/ethernet/qualcomm/ppe/ppe_port.c
22 @@ -537,6 +537,50 @@ int ppe_port_set_mac_eee(struct ppe_port *ppe_port, struct ethtool_keee *eee)
23 return ret;
24 }
25
26 +/**
27 + * ppe_port_set_maxframe() - Set port maximum frame size
28 + * @ppe_port: PPE port structure
29 + * @maxframe_size: Maximum frame size supported by PPE port
30 + *
31 + * Description: Set MTU of network interface specified by @ppe_port.
32 + *
33 + * Return: 0 upon success or a negative error upon failure.
34 + */
35 +int ppe_port_set_maxframe(struct ppe_port *ppe_port, int maxframe_size)
36 +{
37 + struct ppe_device *ppe_dev = ppe_port->ppe_dev;
38 + u32 reg, val, mru_mtu_val[3];
39 + int port = ppe_port->port_id;
40 + int ret;
41 +
42 + /* The max frame size should be MTU added by ETH_HLEN in PPE. */
43 + maxframe_size += ETH_HLEN;
44 +
45 + /* MAC takes cover the FCS for the calculation of frame size. */
46 + if (maxframe_size > PPE_PORT_MAC_MAX_FRAME_SIZE - ETH_FCS_LEN)
47 + return -EINVAL;
48 +
49 + reg = PPE_MC_MTU_CTRL_TBL_ADDR + PPE_MC_MTU_CTRL_TBL_INC * port;
50 + val = FIELD_PREP(PPE_MC_MTU_CTRL_TBL_MTU, maxframe_size);
51 + ret = regmap_update_bits(ppe_dev->regmap, reg,
52 + PPE_MC_MTU_CTRL_TBL_MTU,
53 + val);
54 + if (ret)
55 + return ret;
56 +
57 + reg = PPE_MRU_MTU_CTRL_TBL_ADDR + PPE_MRU_MTU_CTRL_TBL_INC * port;
58 + ret = regmap_bulk_read(ppe_dev->regmap, reg,
59 + mru_mtu_val, ARRAY_SIZE(mru_mtu_val));
60 + if (ret)
61 + return ret;
62 +
63 + PPE_MRU_MTU_CTRL_SET_MRU(mru_mtu_val, maxframe_size);
64 + PPE_MRU_MTU_CTRL_SET_MTU(mru_mtu_val, maxframe_size);
65 +
66 + return regmap_bulk_write(ppe_dev->regmap, reg,
67 + mru_mtu_val, ARRAY_SIZE(mru_mtu_val));
68 +}
69 +
70 /* PPE port and MAC reset */
71 static int ppe_port_mac_reset(struct ppe_port *ppe_port)
72 {
73 diff --git a/drivers/net/ethernet/qualcomm/ppe/ppe_port.h b/drivers/net/ethernet/qualcomm/ppe/ppe_port.h
74 index 2234c9bfbd9a..8234e86fb401 100644
75 --- a/drivers/net/ethernet/qualcomm/ppe/ppe_port.h
76 +++ b/drivers/net/ethernet/qualcomm/ppe/ppe_port.h
77 @@ -89,4 +89,5 @@ void ppe_port_get_stats64(struct ppe_port *ppe_port,
78 struct rtnl_link_stats64 *s);
79 int ppe_port_set_mac_address(struct ppe_port *ppe_port, const u8 *addr);
80 int ppe_port_set_mac_eee(struct ppe_port *ppe_port, struct ethtool_eee *eee);
81 +int ppe_port_set_maxframe(struct ppe_port *ppe_port, int maxframe_size);
82 #endif
83 --
84 2.45.2
85