e72d1180c58c940f361071dba7cc37ff97b1ef35
[openwrt/staging/ansuel.git] /
1 From fd712118aa1aa758da1fd1546b3f8a1b00e42cbc Mon Sep 17 00:00:00 2001
2 From: Mantas Pucka <mantas@8devices.com>
3 Date: Tue, 23 Jan 2024 11:26:09 +0200
4 Subject: [PATCH] clk: qcom: gcc-ipq6018: add qdss_at clock needed for wifi
5 operation
6
7 Without it system hangs upon wifi firmware load. It should be enabled by
8 remoteproc/wifi driver. Bindings already exist for it, so add it based
9 on vendor code.
10
11 Signed-off-by: Mantas Pucka <mantas@8devices.com>
12 Link: https://lore.kernel.org/r/1706001970-26032-1-git-send-email-mantas@8devices.com
13 Signed-off-by: Bjorn Andersson <andersson@kernel.org>
14 ---
15 drivers/clk/qcom/gcc-ipq6018.c | 17 +++++++++++++++++
16 1 file changed, 17 insertions(+)
17
18 --- a/drivers/clk/qcom/gcc-ipq6018.c
19 +++ b/drivers/clk/qcom/gcc-ipq6018.c
20 @@ -3523,6 +3523,22 @@ static struct clk_branch gcc_prng_ahb_cl
21 },
22 };
23
24 +static struct clk_branch gcc_qdss_at_clk = {
25 + .halt_reg = 0x29024,
26 + .clkr = {
27 + .enable_reg = 0x29024,
28 + .enable_mask = BIT(0),
29 + .hw.init = &(struct clk_init_data){
30 + .name = "gcc_qdss_at_clk",
31 + .parent_hws = (const struct clk_hw *[]){
32 + &qdss_at_clk_src.clkr.hw },
33 + .num_parents = 1,
34 + .flags = CLK_SET_RATE_PARENT,
35 + .ops = &clk_branch2_ops,
36 + },
37 + },
38 +};
39 +
40 static struct clk_branch gcc_qdss_dap_clk = {
41 .halt_reg = 0x29084,
42 .clkr = {
43 @@ -4362,6 +4378,7 @@ static struct clk_regmap *gcc_ipq6018_cl
44 [GCC_SYS_NOC_PCIE0_AXI_CLK] = &gcc_sys_noc_pcie0_axi_clk.clkr,
45 [GCC_PCIE0_PIPE_CLK] = &gcc_pcie0_pipe_clk.clkr,
46 [GCC_PRNG_AHB_CLK] = &gcc_prng_ahb_clk.clkr,
47 + [GCC_QDSS_AT_CLK] = &gcc_qdss_at_clk.clkr,
48 [GCC_QDSS_DAP_CLK] = &gcc_qdss_dap_clk.clkr,
49 [GCC_QPIC_AHB_CLK] = &gcc_qpic_ahb_clk.clkr,
50 [GCC_QPIC_CLK] = &gcc_qpic_clk.clkr,