1 From e3ab3267a0bbedc37725bb845a332ec33b247263 Mon Sep 17 00:00:00 2001
2 From: Robert Marko <robimarko@gmail.com>
3 Date: Tue, 27 Feb 2024 18:54:22 +0100
4 Subject: [PATCH 2/2] net: dsa: mv88e6xxx: add Amethyst specific SMI GPIO
7 The existing mv88e6390_g2_scratch_gpio_set_smi() cannot be used on the
8 88E6393X as it requires certain P0_MODE, it also checks the CPU mode
9 as it impacts the bit setting value.
11 This is all irrelevant for Amethyst (MV88E6191X/6193X/6393X) as only
12 the default value of the SMI_PHY Config bit is set to CPU_MGD bootstrap
13 pin value but it can be changed without restrictions so that GPIO pins
14 9 and 10 are used as SMI pins.
16 So, introduce Amethyst specific function and call that if the Amethyst
17 family wants to setup the external PHY.
19 Reviewed-by: Andrew Lunn <andrew@lunn.ch>
20 Signed-off-by: Robert Marko <robimarko@gmail.com>
21 Signed-off-by: Paolo Abeni <pabeni@redhat.com>
23 drivers/net/dsa/mv88e6xxx/chip.c | 5 +++-
24 drivers/net/dsa/mv88e6xxx/global2.h | 2 ++
25 drivers/net/dsa/mv88e6xxx/global2_scratch.c | 31 +++++++++++++++++++++
26 3 files changed, 37 insertions(+), 1 deletion(-)
28 --- a/drivers/net/dsa/mv88e6xxx/chip.c
29 +++ b/drivers/net/dsa/mv88e6xxx/chip.c
30 @@ -3669,7 +3669,10 @@ static int mv88e6xxx_mdio_register(struc
33 mv88e6xxx_reg_lock(chip);
34 - err = mv88e6390_g2_scratch_gpio_set_smi(chip, true);
35 + if (chip->info->family == MV88E6XXX_FAMILY_6393)
36 + err = mv88e6393x_g2_scratch_gpio_set_smi(chip, true);
38 + err = mv88e6390_g2_scratch_gpio_set_smi(chip, true);
39 mv88e6xxx_reg_unlock(chip);
42 --- a/drivers/net/dsa/mv88e6xxx/global2.h
43 +++ b/drivers/net/dsa/mv88e6xxx/global2.h
44 @@ -380,6 +380,8 @@ extern const struct mv88e6xxx_gpio_ops m
46 int mv88e6390_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip,
48 +int mv88e6393x_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip,
50 int mv88e6352_g2_scratch_port_has_serdes(struct mv88e6xxx_chip *chip, int port);
51 int mv88e6xxx_g2_atu_stats_set(struct mv88e6xxx_chip *chip, u16 kind, u16 bin);
52 int mv88e6xxx_g2_atu_stats_get(struct mv88e6xxx_chip *chip, u16 *stats);
53 --- a/drivers/net/dsa/mv88e6xxx/global2_scratch.c
54 +++ b/drivers/net/dsa/mv88e6xxx/global2_scratch.c
55 @@ -291,6 +291,37 @@ int mv88e6390_g2_scratch_gpio_set_smi(st
59 + * mv88e6393x_g2_scratch_gpio_set_smi - set gpio muxing for external smi
60 + * @chip: chip private data
61 + * @external: set mux for external smi, or free for gpio usage
63 + * MV88E6191X/6193X/6393X GPIO pins 9 and 10 can be configured as an
64 + * external SMI interface or as regular GPIO-s.
66 + * They however have a different register layout then the existing
70 +int mv88e6393x_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip,
73 + int misc_cfg = MV88E6352_G2_SCRATCH_MISC_CFG;
77 + err = mv88e6xxx_g2_scratch_read(chip, misc_cfg, &val);
82 + val &= ~MV88E6352_G2_SCRATCH_MISC_CFG_NORMALSMI;
84 + val |= MV88E6352_G2_SCRATCH_MISC_CFG_NORMALSMI;
86 + return mv88e6xxx_g2_scratch_write(chip, misc_cfg, val);
90 * mv88e6352_g2_scratch_port_has_serdes - indicate if a port can have a serdes
91 * @chip: chip private data
92 * @port: port number to check for serdes