git.openwrt.org Git - openwrt/staging/wigyori.git/blob

   1 From ee0e0ddb910e7e989b65a19d72b6435baa641fc7 Mon Sep 17 00:00:00 2001
   2 From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
   3 Date: Fri, 24 Nov 2023 12:28:34 +0000
   4 Subject: [PATCH 6/7] net: phylink: split out PHY validation from
   5  phylink_bringup_phy()
   6
   7 When bringing up a PHY, we need to work out which ethtool link modes it
   8 should support and advertise. Clause 22 PHYs operate in a single
   9 interface mode, which can be easily dealt with. However, clause 45 PHYs
  10 tend to switch interface mode depending on the media. We need more
  11 flexible validation at this point, so this patch splits out that code
  12 in preparation to changing it.
  13
  14 Tested-by: Luo Jie <quic_luoj@quicinc.com>
  15 Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
  16 Reviewed-by: Andrew Lunn <andrew@lunn.ch>
  17 Link: https://lore.kernel.org/r/E1r6VIQ-00DDM9-LK@rmk-PC.armlinux.org.uk
  18 Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  19 ---
  20  drivers/net/phy/phylink.c | 56 ++++++++++++++++++++++-----------------
  21  1 file changed, 31 insertions(+), 25 deletions(-)
  22
  23 --- a/drivers/net/phy/phylink.c
  24 +++ b/drivers/net/phy/phylink.c
  25 @@ -1775,6 +1775,35 @@ static void phylink_phy_change(struct ph
  26                     phylink_pause_to_str(pl->phy_state.pause));
  27  }
  28
  29 +static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy,
  30 +                               unsigned long *supported,
  31 +                               struct phylink_link_state *state)
  32 +{
  33 +       /* Check whether we would use rate matching for the proposed interface
  34 +        * mode.
  35 +        */
  36 +       state->rate_matching = phy_get_rate_matching(phy, state->interface);
  37 +
  38 +       /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R,
  39 +        * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching.
  40 +        * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching
  41 +        * their Serdes is either unnecessary or not reasonable.
  42 +        *
  43 +        * For these which switch interface modes, we really need to know which
  44 +        * interface modes the PHY supports to properly work out which ethtool
  45 +        * linkmodes can be supported. For now, as a work-around, we validate
  46 +        * against all interface modes, which may lead to more ethtool link
  47 +        * modes being advertised than are actually supported.
  48 +        */
  49 +       if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE &&
  50 +           state->interface != PHY_INTERFACE_MODE_RXAUI &&
  51 +           state->interface != PHY_INTERFACE_MODE_XAUI &&
  52 +           state->interface != PHY_INTERFACE_MODE_USXGMII)
  53 +               state->interface = PHY_INTERFACE_MODE_NA;
  54 +
  55 +       return phylink_validate(pl, supported, state);
  56 +}
  57 +
  58  static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,
  59                                phy_interface_t interface)
  60  {
  61 @@ -1795,32 +1824,9 @@ static int phylink_bringup_phy(struct ph
  62         memset(&config, 0, sizeof(config));
  63         linkmode_copy(supported, phy->supported);
  64         linkmode_copy(config.advertising, phy->advertising);
  65 +       config.interface = interface;
  66
  67 -       /* Check whether we would use rate matching for the proposed interface
  68 -        * mode.
  69 -        */
  70 -       config.rate_matching = phy_get_rate_matching(phy, interface);
  71 -
  72 -       /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R,
  73 -        * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching.
  74 -        * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching
  75 -        * their Serdes is either unnecessary or not reasonable.
  76 -        *
  77 -        * For these which switch interface modes, we really need to know which
  78 -        * interface modes the PHY supports to properly work out which ethtool
  79 -        * linkmodes can be supported. For now, as a work-around, we validate
  80 -        * against all interface modes, which may lead to more ethtool link
  81 -        * modes being advertised than are actually supported.
  82 -        */
  83 -       if (phy->is_c45 && config.rate_matching == RATE_MATCH_NONE &&
  84 -           interface != PHY_INTERFACE_MODE_RXAUI &&
  85 -           interface != PHY_INTERFACE_MODE_XAUI &&
  86 -           interface != PHY_INTERFACE_MODE_USXGMII)
  87 -               config.interface = PHY_INTERFACE_MODE_NA;
  88 -       else
  89 -               config.interface = interface;
  90 -
  91 -       ret = phylink_validate(pl, supported, &config);
  92 +       ret = phylink_validate_phy(pl, phy, supported, &config);
  93         if (ret) {
  94                 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n",
  95                              phy_modes(config.interface),