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1 From 18dd1ef9417d0880f2f492b55bd4d9ede499f137 Mon Sep 17 00:00:00 2001
2 From: Weijie Gao <weijie.gao@mediatek.com>
3 Date: Fri, 20 May 2022 11:24:10 +0800
4 Subject: [PATCH 24/25] tools: mtk_image: add support for MT7621 NAND images
5
6 The BootROM of MT7621 requires a image header for SPL to record its size
7 and load address when booting from NAND.
8
9 To create such an image, one can use the following command line:
10 mkimage -T mtk_image -a 0x80200000 -e 0x80200000 -n "mt7621=1"
11 -d u-boot-spl-ddr.bin u-boot-spl-ddr.img
12
13 Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
14 Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
15 ---
16 tools/mtk_image.c | 182 ++++++++++++++++++++++++++++++++++++++++++++++
17 tools/mtk_image.h | 24 ++++++
18 2 files changed, 206 insertions(+)
19
20 --- a/tools/mtk_image.c
21 +++ b/tools/mtk_image.c
22 @@ -6,7 +6,9 @@
23 * Author: Weijie Gao <weijie.gao@mediatek.com>
24 */
25
26 +#include <time.h>
27 #include <image.h>
28 +#include <u-boot/crc.h>
29 #include <u-boot/sha256.h>
30 #include "imagetool.h"
31 #include "mtk_image.h"
32 @@ -251,17 +253,45 @@ static uint32_t img_size;
33 static enum brlyt_img_type hdr_media;
34 static uint32_t hdr_offset;
35 static int use_lk_hdr;
36 +static int use_mt7621_hdr;
37 static bool is_arm64_image;
38
39 /* LK image name */
40 static char lk_name[32] = "U-Boot";
41
42 +/* CRC32 normal table required by MT7621 image */
43 +static uint32_t crc32tbl[256];
44 +
45 /* NAND header selected by user */
46 static const union nand_boot_header *hdr_nand;
47
48 /* GFH header + 2 * 4KB pages of NAND */
49 static char hdr_tmp[sizeof(struct gfh_header) + 0x2000];
50
51 +static uint32_t crc32_normal_cal(uint32_t crc, const void *data, size_t length,
52 + const uint32_t *crc32c_table)
53 +{
54 + const uint8_t *p = data;
55 +
56 + while (length--)
57 + crc = crc32c_table[(uint8_t)((crc >> 24) ^ *p++)] ^ (crc << 8);
58 +
59 + return crc;
60 +}
61 +
62 +static void crc32_normal_init(uint32_t *crc32c_table, uint32_t poly)
63 +{
64 + uint32_t v, i, j;
65 +
66 + for (i = 0; i < 256; i++) {
67 + v = i << 24;
68 + for (j = 0; j < 8; j++)
69 + v = (v << 1) ^ ((v & (1 << 31)) ? poly : 0);
70 +
71 + crc32c_table[i] = v;
72 + }
73 +}
74 +
75 static int mtk_image_check_image_types(uint8_t type)
76 {
77 if (type == IH_TYPE_MTKIMAGE)
78 @@ -283,6 +313,7 @@ static int mtk_brom_parse_imagename(cons
79 static const char *hdr_offs = "";
80 static const char *nandinfo = "";
81 static const char *lk = "";
82 + static const char *mt7621 = "";
83 static const char *arm64_param = "";
84
85 key = buf;
86 @@ -332,6 +363,9 @@ static int mtk_brom_parse_imagename(cons
87 if (!strcmp(key, "lk"))
88 lk = val;
89
90 + if (!strcmp(key, "mt7621"))
91 + mt7621 = val;
92 +
93 if (!strcmp(key, "lkname"))
94 snprintf(lk_name, sizeof(lk_name), "%s", val);
95
96 @@ -352,6 +386,13 @@ static int mtk_brom_parse_imagename(cons
97 return 0;
98 }
99
100 + /* if user specified MT7621 image header, skip following checks */
101 + if (mt7621 && mt7621[0] == '1') {
102 + use_mt7621_hdr = 1;
103 + free(buf);
104 + return 0;
105 + }
106 +
107 /* parse media type */
108 for (i = 0; i < ARRAY_SIZE(brom_images); i++) {
109 if (!strcmp(brom_images[i].name, media)) {
110 @@ -419,6 +460,13 @@ static int mtk_image_vrec_header(struct
111 return 0;
112 }
113
114 + if (use_mt7621_hdr) {
115 + tparams->header_size = image_get_header_size();
116 + tparams->hdr = &hdr_tmp;
117 + memset(&hdr_tmp, 0, tparams->header_size);
118 + return 0;
119 + }
120 +
121 if (hdr_media == BRLYT_TYPE_NAND || hdr_media == BRLYT_TYPE_SNAND)
122 tparams->header_size = 2 * le16_to_cpu(hdr_nand->pagesize);
123 else
124 @@ -579,9 +627,90 @@ static int mtk_image_verify_nand_header(
125 return 0;
126 }
127
128 +static uint32_t crc32be_cal(const void *data, size_t length)
129 +{
130 + uint32_t crc = 0;
131 + uint8_t c;
132 +
133 + if (crc32tbl[1] != MT7621_IH_CRC_POLYNOMIAL)
134 + crc32_normal_init(crc32tbl, MT7621_IH_CRC_POLYNOMIAL);
135 +
136 + crc = crc32_normal_cal(crc, data, length, crc32tbl);
137 +
138 + for (; length; length >>= 8) {
139 + c = length & 0xff;
140 + crc = crc32_normal_cal(crc, &c, 1, crc32tbl);
141 + }
142 +
143 + return ~crc;
144 +}
145 +
146 +static int mtk_image_verify_mt7621_header(const uint8_t *ptr, int print)
147 +{
148 + const image_header_t *hdr = (const image_header_t *)ptr;
149 + struct mt7621_nand_header *nhdr;
150 + uint32_t spl_size, crcval;
151 + image_header_t header;
152 + int ret;
153 +
154 + spl_size = image_get_size(hdr);
155 +
156 + if (spl_size > img_size) {
157 + if (print)
158 + printf("Incomplete SPL image\n");
159 + return -1;
160 + }
161 +
162 + ret = image_check_hcrc(hdr);
163 + if (!ret) {
164 + if (print)
165 + printf("Bad header CRC\n");
166 + return -1;
167 + }
168 +
169 + ret = image_check_dcrc(hdr);
170 + if (!ret) {
171 + if (print)
172 + printf("Bad data CRC\n");
173 + return -1;
174 + }
175 +
176 + /* Copy header so we can blank CRC field for re-calculation */
177 + memmove(&header, hdr, image_get_header_size());
178 + image_set_hcrc(&header, 0);
179 +
180 + nhdr = (struct mt7621_nand_header *)header.ih_name;
181 + crcval = be32_to_cpu(nhdr->crc);
182 + nhdr->crc = 0;
183 +
184 + if (crcval != crc32be_cal(&header, image_get_header_size())) {
185 + if (print)
186 + printf("Bad NAND header CRC\n");
187 + return -1;
188 + }
189 +
190 + if (print) {
191 + printf("Load Address: %08x\n", image_get_load(hdr));
192 +
193 + printf("Image Name: %.*s\n", MT7621_IH_NMLEN,
194 + image_get_name(hdr));
195 +
196 + if (IMAGE_ENABLE_TIMESTAMP) {
197 + printf("Created: ");
198 + genimg_print_time((time_t)image_get_time(hdr));
199 + }
200 +
201 + printf("Data Size: ");
202 + genimg_print_size(image_get_data_size(hdr));
203 + }
204 +
205 + return 0;
206 +}
207 +
208 static int mtk_image_verify_header(unsigned char *ptr, int image_size,
209 struct image_tool_params *params)
210 {
211 + image_header_t *hdr = (image_header_t *)ptr;
212 union lk_hdr *lk = (union lk_hdr *)ptr;
213
214 /* nothing to verify for LK image header */
215 @@ -590,6 +719,9 @@ static int mtk_image_verify_header(unsig
216
217 img_size = image_size;
218
219 + if (image_get_magic(hdr) == IH_MAGIC)
220 + return mtk_image_verify_mt7621_header(ptr, 0);
221 +
222 if (!strcmp((char *)ptr, NAND_BOOT_NAME))
223 return mtk_image_verify_nand_header(ptr, 0);
224 else
225 @@ -600,6 +732,7 @@ static int mtk_image_verify_header(unsig
226
227 static void mtk_image_print_header(const void *ptr)
228 {
229 + image_header_t *hdr = (image_header_t *)ptr;
230 union lk_hdr *lk = (union lk_hdr *)ptr;
231
232 if (le32_to_cpu(lk->magic) == LK_PART_MAGIC) {
233 @@ -610,6 +743,11 @@ static void mtk_image_print_header(const
234
235 printf("Image Type: MediaTek BootROM Loadable Image\n");
236
237 + if (image_get_magic(hdr) == IH_MAGIC) {
238 + mtk_image_verify_mt7621_header(ptr, 1);
239 + return;
240 + }
241 +
242 if (!strcmp((char *)ptr, NAND_BOOT_NAME))
243 mtk_image_verify_nand_header(ptr, 1);
244 else
245 @@ -773,6 +911,45 @@ static void mtk_image_set_nand_header(vo
246 filesize - 2 * le16_to_cpu(hdr_nand->pagesize) - SHA256_SUM_LEN);
247 }
248
249 +static void mtk_image_set_mt7621_header(void *ptr, off_t filesize,
250 + uint32_t loadaddr)
251 +{
252 + image_header_t *hdr = (image_header_t *)ptr;
253 + struct mt7621_stage1_header *shdr;
254 + struct mt7621_nand_header *nhdr;
255 + uint32_t datasize, crcval;
256 +
257 + datasize = filesize - image_get_header_size();
258 + nhdr = (struct mt7621_nand_header *)hdr->ih_name;
259 + shdr = (struct mt7621_stage1_header *)(ptr + image_get_header_size());
260 +
261 + shdr->ep = cpu_to_be32(loadaddr);
262 + shdr->stage_size = cpu_to_be32(datasize);
263 +
264 + image_set_magic(hdr, IH_MAGIC);
265 + image_set_time(hdr, time(NULL));
266 + image_set_size(hdr, datasize);
267 + image_set_load(hdr, loadaddr);
268 + image_set_ep(hdr, loadaddr);
269 + image_set_os(hdr, IH_OS_U_BOOT);
270 + image_set_arch(hdr, IH_ARCH_MIPS);
271 + image_set_type(hdr, IH_TYPE_STANDALONE);
272 + image_set_comp(hdr, IH_COMP_NONE);
273 +
274 + crcval = crc32(0, (uint8_t *)shdr, datasize);
275 + image_set_dcrc(hdr, crcval);
276 +
277 + strncpy(nhdr->ih_name, "MT7621 NAND", MT7621_IH_NMLEN);
278 +
279 + nhdr->ih_stage_offset = cpu_to_be32(image_get_header_size());
280 +
281 + crcval = crc32be_cal(hdr, image_get_header_size());
282 + nhdr->crc = cpu_to_be32(crcval);
283 +
284 + crcval = crc32(0, (uint8_t *)hdr, image_get_header_size());
285 + image_set_hcrc(hdr, crcval);
286 +}
287 +
288 static void mtk_image_set_header(void *ptr, struct stat *sbuf, int ifd,
289 struct image_tool_params *params)
290 {
291 @@ -791,6 +968,11 @@ static void mtk_image_set_header(void *p
292 img_gen = true;
293 img_size = sbuf->st_size;
294
295 + if (use_mt7621_hdr) {
296 + mtk_image_set_mt7621_header(ptr, sbuf->st_size, params->addr);
297 + return;
298 + }
299 +
300 if (hdr_media == BRLYT_TYPE_NAND || hdr_media == BRLYT_TYPE_SNAND)
301 mtk_image_set_nand_header(ptr, sbuf->st_size, params->addr);
302 else
303 --- a/tools/mtk_image.h
304 +++ b/tools/mtk_image.h
305 @@ -200,4 +200,28 @@ union lk_hdr {
306
307 #define LK_PART_MAGIC 0x58881688
308
309 +/* MT7621 NAND SPL image header */
310 +
311 +#define MT7621_IH_NMLEN 12
312 +#define MT7621_IH_CRC_POLYNOMIAL 0x04c11db7
313 +
314 +struct mt7621_nand_header {
315 + char ih_name[MT7621_IH_NMLEN];
316 + uint32_t nand_ac_timing;
317 + uint32_t ih_stage_offset;
318 + uint32_t ih_bootloader_offset;
319 + uint32_t nand_info_1_data;
320 + uint32_t crc;
321 +};
322 +
323 +struct mt7621_stage1_header {
324 + uint32_t jump_insn[2];
325 + uint32_t ep;
326 + uint32_t stage_size;
327 + uint32_t has_stage2;
328 + uint32_t next_ep;
329 + uint32_t next_size;
330 + uint32_t next_offset;
331 +};
332 +
333 #endif /* _MTK_IMAGE_H */
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