git.openwrt.org Git - openwrt/staging/rmilecki.git/blob

   1 From b9185c75f7ec2b600ebe0d49281e216a2456b764 Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
   3 Date: Thu, 13 May 2021 15:11:06 +0200
   4 Subject: [PATCH] fix(plat/marvell/a3720/uart): fix configuring UART clock
   5 MIME-Version: 1.0
   6 Content-Type: text/plain; charset=UTF-8
   7 Content-Transfer-Encoding: 8bit
   8
   9 When configuring the UART_BAUD_REG register, the function
  10 console_a3700_core_init() currently only changes the baud divisor field,
  11 leaving other fields to their previous value.
  12
  13 This is incorrect, because the baud divisor is computed with the
  14 assumption that the parent clock rate is 25 MHz, and since the other
  15 fields in this register configure the parent clock, which could have
  16 been changed by U-Boot or Linux.
  17
  18 Fix this function to also configure the other fields so that the UART
  19 parent clock is selected to be the xtal clock.
  20
  21 For example without this change TF-A prints only
  22
  23     ERROR: a3700_system_off needs to be implemented
  24
  25 followed by garbage after plat_crash_console_init() is called.
  26
  27 After applying this change instead of garbage it also print crash info:
  28
  29     PANIC at PC : 0x0000000004023800
  30
  31 Signed-off-by: Pali Rohár <pali@kernel.org>
  32 Change-Id: I72f338355cc60d939b8bb978d9c7fdd576416b81
  33 ---
  34  drivers/marvell/uart/a3700_console.S | 7 ++-----
  35  1 file changed, 2 insertions(+), 5 deletions(-)
  36
  37 --- a/drivers/marvell/uart/a3700_console.S
  38 +++ b/drivers/marvell/uart/a3700_console.S
  39 @@ -49,12 +49,9 @@ func console_a3700_core_init
  40         lsl     w2, w2, #4
  41         add     w1, w1, w2, lsr #1
  42         udiv    w2, w1, w2
  43 -       and     w2, w2, #0x3ff
  44 +       and     w2, w2, #0x3ff /* clear all other bits to use default clock */
  45
  46 -       ldr     w3, [x0, #UART_BAUD_REG]
  47 -       bic     w3, w3, 0x3ff
  48 -       orr     w3, w3, w2
  49 -       str     w3, [x0, #UART_BAUD_REG]/* set baud rate divisor */
  50 +       str     w2, [x0, #UART_BAUD_REG]/* set baud rate divisor */
  51
  52         /* Set UART to default 16X scheme */
  53         mov     w3, #0