git.openwrt.org Git - openwrt/staging/pepe2k.git/blob

   1 From 3bc37b0ee99b9d66ac47aea02784242cb3224366 Mon Sep 17 00:00:00 2001
   2 From: Zhao Qiang <B45475@freescale.com>
   3 Date: Fri, 10 Oct 2014 10:38:48 +0800
   4 Subject: [PATCH] arch: arm: add ARM specific fucntions required for ehci fsl
   5  driver
   6
   7 Add below functions for ARM platform which are used by ehci fsl driver:
   8 1. spin_event_timeout function
   9 2. set/clear bits functions
  10
  11 Signed-off-by: Zhao Qiang <B45475@freescale.com>
  12 Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
  13 ---
  14  arch/arm/include/asm/delay.h | 16 ++++++++++++++++
  15  arch/arm/include/asm/io.h    | 28 ++++++++++++++++++++++++++++
  16  2 files changed, 44 insertions(+)
  17
  18 --- a/arch/arm/include/asm/delay.h
  19 +++ b/arch/arm/include/asm/delay.h
  20 @@ -85,6 +85,22 @@ extern void __bad_udelay(void);
  21                         __const_udelay((n) * UDELAY_MULT)) :            \
  22           __udelay(n))
  23
  24 +#define spin_event_timeout(condition, timeout, delay)                          \
  25 +({                                                                             \
  26 +       typeof(condition) __ret;                                               \
  27 +       int i = 0;                                                             \
  28 +       while (!(__ret = (condition)) && (i++ < timeout)) {                    \
  29 +               if (delay)                                                     \
  30 +                       udelay(delay);                                         \
  31 +               else                                                           \
  32 +                       cpu_relax();                                           \
  33 +               udelay(1);                                                     \
  34 +       }                                                                      \
  35 +       if (!__ret)                                                            \
  36 +               __ret = (condition);                                           \
  37 +       __ret;                                                                 \
  38 +})
  39 +
  40  /* Loop-based definitions for assembly code. */
  41  extern void __loop_delay(unsigned long loops);
  42  extern void __loop_udelay(unsigned long usecs);
  43 --- a/arch/arm/include/asm/io.h
  44 +++ b/arch/arm/include/asm/io.h
  45 @@ -224,6 +224,34 @@ void __iomem *pci_remap_cfgspace(resourc
  46  #endif
  47  #endif
  48
  49 +/* access ports */
  50 +#define setbits32(_addr, _v) iowrite32be(ioread32be(_addr) |  (_v), (_addr))
  51 +#define clrbits32(_addr, _v) iowrite32be(ioread32be(_addr) & ~(_v), (_addr))
  52 +
  53 +#define setbits16(_addr, _v) iowrite16be(ioread16be(_addr) |  (_v), (_addr))
  54 +#define clrbits16(_addr, _v) iowrite16be(ioread16be(_addr) & ~(_v), (_addr))
  55 +
  56 +#define setbits8(_addr, _v) iowrite8(ioread8(_addr) |  (_v), (_addr))
  57 +#define clrbits8(_addr, _v) iowrite8(ioread8(_addr) & ~(_v), (_addr))
  58 +
  59 +/* Clear and set bits in one shot.  These macros can be used to clear and
  60 + * set multiple bits in a register using a single read-modify-write.  These
  61 + * macros can also be used to set a multiple-bit bit pattern using a mask,
  62 + * by specifying the mask in the 'clear' parameter and the new bit pattern
  63 + * in the 'set' parameter.
  64 + */
  65 +
  66 +#define clrsetbits_be32(addr, clear, set) \
  67 +       iowrite32be((ioread32be(addr) & ~(clear)) | (set), (addr))
  68 +#define clrsetbits_le32(addr, clear, set) \
  69 +       iowrite32le((ioread32le(addr) & ~(clear)) | (set), (addr))
  70 +#define clrsetbits_be16(addr, clear, set) \
  71 +       iowrite16be((ioread16be(addr) & ~(clear)) | (set), (addr))
  72 +#define clrsetbits_le16(addr, clear, set) \
  73 +       iowrite16le((ioread16le(addr) & ~(clear)) | (set), (addr))
  74 +#define clrsetbits_8(addr, clear, set) \
  75 +       iowrite8((ioread8(addr) & ~(clear)) | (set), (addr))
  76 +
  77  /*
  78   *  IO port access primitives
  79   *  -------------------------