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1 From 23680321789863bab2d60af507858ce50ff9f56a Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Alexis=20Lothor=C3=A9?= <alexis.lothore@bootlin.com>
3 Date: Mon, 29 May 2023 10:02:46 +0200
4 Subject: [PATCH 6/6] net: dsa: mv88e6xxx: enable support for 88E6361 switch
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8
9 Marvell 88E6361 is an 8-port switch derived from the
10 88E6393X/88E9193X/88E6191X switches family. It can benefit from the
11 existing mv88e6xxx driver by simply adding the proper switch description in
12 the driver. Main differences with other switches from this
13 family are:
14 - 8 ports exposed (instead of 11): ports 1, 2 and 8 not available
15 - No 5GBase-x nor SFI/USXGMII support
16
17 Signed-off-by: Alexis Lothoré <alexis.lothore@bootlin.com>
18 Reviewed-by: Andrew Lunn <andrew@lunn.ch>
19 Signed-off-by: Jakub Kicinski <kuba@kernel.org>
20 ---
21 drivers/net/dsa/mv88e6xxx/chip.c | 42 ++++++++++++++++++++++++++++----
22 drivers/net/dsa/mv88e6xxx/chip.h | 3 ++-
23 drivers/net/dsa/mv88e6xxx/port.c | 14 ++++++++---
24 drivers/net/dsa/mv88e6xxx/port.h | 1 +
25 4 files changed, 51 insertions(+), 9 deletions(-)
26
27 --- a/drivers/net/dsa/mv88e6xxx/chip.c
28 +++ b/drivers/net/dsa/mv88e6xxx/chip.c
29 @@ -797,6 +797,8 @@ static void mv88e6393x_phylink_get_caps(
30 unsigned long *supported = config->supported_interfaces;
31 bool is_6191x =
32 chip->info->prod_num == MV88E6XXX_PORT_SWITCH_ID_PROD_6191X;
33 + bool is_6361 =
34 + chip->info->prod_num == MV88E6XXX_PORT_SWITCH_ID_PROD_6361;
35
36 mv88e6xxx_translate_cmode(chip->ports[port].cmode, supported);
37
38 @@ -811,13 +813,17 @@ static void mv88e6393x_phylink_get_caps(
39 /* 6191X supports >1G modes only on port 10 */
40 if (!is_6191x || port == 10) {
41 __set_bit(PHY_INTERFACE_MODE_2500BASEX, supported);
42 - __set_bit(PHY_INTERFACE_MODE_5GBASER, supported);
43 - __set_bit(PHY_INTERFACE_MODE_10GBASER, supported);
44 + config->mac_capabilities |= MAC_2500FD;
45 +
46 + /* 6361 only supports up to 2500BaseX */
47 + if (!is_6361) {
48 + __set_bit(PHY_INTERFACE_MODE_5GBASER, supported);
49 + __set_bit(PHY_INTERFACE_MODE_10GBASER, supported);
50 + config->mac_capabilities |= MAC_5000FD |
51 + MAC_10000FD;
52 + }
53 /* FIXME: USXGMII is not supported yet */
54 /* __set_bit(PHY_INTERFACE_MODE_USXGMII, supported); */
55 -
56 - config->mac_capabilities |= MAC_2500FD | MAC_5000FD |
57 - MAC_10000FD;
58 }
59 }
60
61 @@ -6231,6 +6237,32 @@ static const struct mv88e6xxx_info mv88e
62 .ptp_support = true,
63 .ops = &mv88e6352_ops,
64 },
65 + [MV88E6361] = {
66 + .prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6361,
67 + .family = MV88E6XXX_FAMILY_6393,
68 + .name = "Marvell 88E6361",
69 + .num_databases = 4096,
70 + .num_macs = 16384,
71 + .num_ports = 11,
72 + /* Ports 1, 2 and 8 are not routed */
73 + .invalid_port_mask = BIT(1) | BIT(2) | BIT(8),
74 + .num_internal_phys = 5,
75 + .internal_phys_offset = 3,
76 + .max_vid = 4095,
77 + .max_sid = 63,
78 + .port_base_addr = 0x0,
79 + .phy_base_addr = 0x0,
80 + .global1_addr = 0x1b,
81 + .global2_addr = 0x1c,
82 + .age_time_coeff = 3750,
83 + .g1_irqs = 10,
84 + .g2_irqs = 14,
85 + .atu_move_port_mask = 0x1f,
86 + .pvt = true,
87 + .multi_chip = true,
88 + .ptp_support = true,
89 + .ops = &mv88e6393x_ops,
90 + },
91 [MV88E6390] = {
92 .prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6390,
93 .family = MV88E6XXX_FAMILY_6390,
94 --- a/drivers/net/dsa/mv88e6xxx/chip.h
95 +++ b/drivers/net/dsa/mv88e6xxx/chip.h
96 @@ -82,6 +82,7 @@ enum mv88e6xxx_model {
97 MV88E6350,
98 MV88E6351,
99 MV88E6352,
100 + MV88E6361,
101 MV88E6390,
102 MV88E6390X,
103 MV88E6393X,
104 @@ -100,7 +101,7 @@ enum mv88e6xxx_family {
105 MV88E6XXX_FAMILY_6351, /* 6171 6175 6350 6351 */
106 MV88E6XXX_FAMILY_6352, /* 6172 6176 6240 6352 */
107 MV88E6XXX_FAMILY_6390, /* 6190 6190X 6191 6290 6390 6390X */
108 - MV88E6XXX_FAMILY_6393, /* 6191X 6193X 6393X */
109 + MV88E6XXX_FAMILY_6393, /* 6191X 6193X 6361 6393X */
110 };
111
112 /**
113 --- a/drivers/net/dsa/mv88e6xxx/port.c
114 +++ b/drivers/net/dsa/mv88e6xxx/port.c
115 @@ -424,6 +424,10 @@ int mv88e6393x_port_set_speed_duplex(str
116 u16 reg, ctrl;
117 int err;
118
119 + if (chip->info->prod_num == MV88E6XXX_PORT_SWITCH_ID_PROD_6361 &&
120 + speed > 2500)
121 + return -EOPNOTSUPP;
122 +
123 if (speed == 200 && port != 0)
124 return -EOPNOTSUPP;
125
126 @@ -506,10 +510,14 @@ int mv88e6393x_port_set_speed_duplex(str
127 phy_interface_t mv88e6393x_port_max_speed_mode(struct mv88e6xxx_chip *chip,
128 int port)
129 {
130 - if (port == 0 || port == 9 || port == 10)
131 - return PHY_INTERFACE_MODE_10GBASER;
132
133 - return PHY_INTERFACE_MODE_NA;
134 + if (port != 0 && port != 9 && port != 10)
135 + return PHY_INTERFACE_MODE_NA;
136 +
137 + if (chip->info->prod_num == MV88E6XXX_PORT_SWITCH_ID_PROD_6361)
138 + return PHY_INTERFACE_MODE_2500BASEX;
139 +
140 + return PHY_INTERFACE_MODE_10GBASER;
141 }
142
143 static int mv88e6xxx_port_set_cmode(struct mv88e6xxx_chip *chip, int port,
144 --- a/drivers/net/dsa/mv88e6xxx/port.h
145 +++ b/drivers/net/dsa/mv88e6xxx/port.h
146 @@ -133,6 +133,7 @@
147 #define MV88E6XXX_PORT_SWITCH_ID_PROD_6220 0x2200
148 #define MV88E6XXX_PORT_SWITCH_ID_PROD_6240 0x2400
149 #define MV88E6XXX_PORT_SWITCH_ID_PROD_6250 0x2500
150 +#define MV88E6XXX_PORT_SWITCH_ID_PROD_6361 0x2610
151 #define MV88E6XXX_PORT_SWITCH_ID_PROD_6290 0x2900
152 #define MV88E6XXX_PORT_SWITCH_ID_PROD_6321 0x3100
153 #define MV88E6XXX_PORT_SWITCH_ID_PROD_6141 0x3400
Staging tree of Piotr Dymacz