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db646df022cab7cff13c7ce7261eed39ab14a7c3
[openwrt/staging/aparcar.git] /
1 Instead of defining an enumeration with the FW specific values for the
2 different clock rates, use the actual frequency instead. Also add a
3 boolean to specify whether the clock is XTAL or not.
4
5 Change all board files to reflect this.
6
7 Additionally, this reverts commit 26f45c (ARM: OMAP2+: Legacy support
8 for wl12xx when booted with devicetree), since this is not be needed
9 anymore, now that DT support for WiLink is implemented.
10
11 Cc: Tony Lindgren <tony@atomide.com>
12 Cc: Sekhar Nori <nsekhar@ti.com>
13 Signed-off-by: Luciano Coelho <coelho@ti.com>
14 Reviewed-by: Felipe Balbi <balbi@ti.com>
15
16 ---
17 arch/arm/mach-davinci/board-da850-evm.c | 3 +-
18 arch/arm/mach-omap2/board-omap3evm.c | 3 +-
19 arch/arm/mach-omap2/board-zoom-peripherals.c | 3 +-
20 arch/arm/mach-omap2/devices.c | 39 -------------------
21 drivers/net/wireless/ti/wl12xx/main.c | 58 +++++++++++++++++++++++++++-
22 drivers/net/wireless/ti/wl12xx/wl12xx.h | 28 ++++++++++++++
23 include/linux/wl12xx.h | 27 ++-----------
24 7 files changed, 93 insertions(+), 68 deletions(-)
25
26 --- a/drivers/net/wireless/ti/wl12xx/main.c
27 +++ b/drivers/net/wireless/ti/wl12xx/main.c
28 @@ -1711,6 +1711,43 @@ static struct ieee80211_sta_ht_cap wl12x
29 },
30 };
31
32 +static const struct wl12xx_clock wl12xx_refclock_table[] = {
33 + { 19200000, false, WL12XX_REFCLOCK_19 },
34 + { 26000000, false, WL12XX_REFCLOCK_26 },
35 + { 26000000, true, WL12XX_REFCLOCK_26_XTAL },
36 + { 38400000, false, WL12XX_REFCLOCK_38 },
37 + { 38400000, true, WL12XX_REFCLOCK_38_XTAL },
38 + { 52000000, false, WL12XX_REFCLOCK_52 },
39 + { 0, false, 0 }
40 +};
41 +
42 +static const struct wl12xx_clock wl12xx_tcxoclock_table[] = {
43 + { 16368000, true, WL12XX_TCXOCLOCK_16_368 },
44 + { 16800000, true, WL12XX_TCXOCLOCK_16_8 },
45 + { 19200000, true, WL12XX_TCXOCLOCK_19_2 },
46 + { 26000000, true, WL12XX_TCXOCLOCK_26 },
47 + { 32736000, true, WL12XX_TCXOCLOCK_32_736 },
48 + { 33600000, true, WL12XX_TCXOCLOCK_33_6 },
49 + { 38400000, true, WL12XX_TCXOCLOCK_38_4 },
50 + { 52000000, true, WL12XX_TCXOCLOCK_52 },
51 + { 0, false, 0 }
52 +};
53 +
54 +static int wl12xx_get_clock_idx(const struct wl12xx_clock *table,
55 + u32 freq, bool xtal)
56 +{
57 + int i = 0;
58 +
59 + while(table[i].freq != 0) {
60 + if ((table[i].freq == freq) &&
61 + (table[i].xtal == xtal))
62 + return table[i].hw_idx;
63 + i++;
64 + };
65 +
66 + return -EINVAL;
67 +}
68 +
69 static int wl12xx_setup(struct wl1271 *wl)
70 {
71 struct wl12xx_priv *priv = wl->priv;
72 @@ -1732,7 +1769,16 @@ static int wl12xx_setup(struct wl1271 *w
73 wl12xx_conf_init(wl);
74
75 if (!fref_param) {
76 - priv->ref_clock = pdata->board_ref_clock;
77 + priv->ref_clock = wl12xx_get_clock_idx(wl12xx_refclock_table,
78 + pdata->ref_clock_freq,
79 + pdata->ref_clock_xtal);
80 + if (priv->ref_clock < 0) {
81 + wl1271_error("Invalid ref_clock frequency (%d Hz, %s)",
82 + pdata->ref_clock_freq,
83 + pdata->ref_clock_xtal ? "XTAL" : "not XTAL");
84 +
85 + return priv->ref_clock;
86 + }
87 } else {
88 if (!strcmp(fref_param, "19.2"))
89 priv->ref_clock = WL12XX_REFCLOCK_19;
90 @@ -1751,7 +1797,15 @@ static int wl12xx_setup(struct wl1271 *w
91 }
92
93 if (!tcxo_param) {
94 - priv->tcxo_clock = pdata->board_tcxo_clock;
95 + priv->tcxo_clock = wl12xx_get_clock_idx(wl12xx_tcxoclock_table,
96 + pdata->tcxo_clock_freq,
97 + true);
98 + if (priv->tcxo_clock < 0) {
99 + wl1271_error("Invalid tcxo_clock frequency (%d Hz)",
100 + pdata->tcxo_clock_freq);
101 +
102 + return priv->tcxo_clock;
103 + }
104 } else {
105 if (!strcmp(tcxo_param, "19.2"))
106 priv->tcxo_clock = WL12XX_TCXOCLOCK_19_2;
107 --- a/drivers/net/wireless/ti/wl12xx/wl12xx.h
108 +++ b/drivers/net/wireless/ti/wl12xx/wl12xx.h
109 @@ -79,4 +79,32 @@ struct wl12xx_priv {
110 struct wl127x_rx_mem_pool_addr *rx_mem_addr;
111 };
112
113 +/* Reference clock values */
114 +enum {
115 + WL12XX_REFCLOCK_19 = 0, /* 19.2 MHz */
116 + WL12XX_REFCLOCK_26 = 1, /* 26 MHz */
117 + WL12XX_REFCLOCK_38 = 2, /* 38.4 MHz */
118 + WL12XX_REFCLOCK_52 = 3, /* 52 MHz */
119 + WL12XX_REFCLOCK_38_XTAL = 4, /* 38.4 MHz, XTAL */
120 + WL12XX_REFCLOCK_26_XTAL = 5, /* 26 MHz, XTAL */
121 +};
122 +
123 +/* TCXO clock values */
124 +enum {
125 + WL12XX_TCXOCLOCK_19_2 = 0, /* 19.2MHz */
126 + WL12XX_TCXOCLOCK_26 = 1, /* 26 MHz */
127 + WL12XX_TCXOCLOCK_38_4 = 2, /* 38.4MHz */
128 + WL12XX_TCXOCLOCK_52 = 3, /* 52 MHz */
129 + WL12XX_TCXOCLOCK_16_368 = 4, /* 16.368 MHz */
130 + WL12XX_TCXOCLOCK_32_736 = 5, /* 32.736 MHz */
131 + WL12XX_TCXOCLOCK_16_8 = 6, /* 16.8 MHz */
132 + WL12XX_TCXOCLOCK_33_6 = 7, /* 33.6 MHz */
133 +};
134 +
135 +struct wl12xx_clock {
136 + u32 freq;
137 + bool xtal;
138 + u8 hw_idx;
139 +};
140 +
141 #endif /* __WL12XX_PRIV_H__ */
142 --- a/include/linux/wl12xx.h
143 +++ b/include/linux/wl12xx.h
144 @@ -26,28 +26,6 @@
145
146 #include <linux/err.h>
147
148 -/* Reference clock values */
149 -enum {
150 - WL12XX_REFCLOCK_19 = 0, /* 19.2 MHz */
151 - WL12XX_REFCLOCK_26 = 1, /* 26 MHz */
152 - WL12XX_REFCLOCK_38 = 2, /* 38.4 MHz */
153 - WL12XX_REFCLOCK_52 = 3, /* 52 MHz */
154 - WL12XX_REFCLOCK_38_XTAL = 4, /* 38.4 MHz, XTAL */
155 - WL12XX_REFCLOCK_26_XTAL = 5, /* 26 MHz, XTAL */
156 -};
157 -
158 -/* TCXO clock values */
159 -enum {
160 - WL12XX_TCXOCLOCK_19_2 = 0, /* 19.2MHz */
161 - WL12XX_TCXOCLOCK_26 = 1, /* 26 MHz */
162 - WL12XX_TCXOCLOCK_38_4 = 2, /* 38.4MHz */
163 - WL12XX_TCXOCLOCK_52 = 3, /* 52 MHz */
164 - WL12XX_TCXOCLOCK_16_368 = 4, /* 16.368 MHz */
165 - WL12XX_TCXOCLOCK_32_736 = 5, /* 32.736 MHz */
166 - WL12XX_TCXOCLOCK_16_8 = 6, /* 16.8 MHz */
167 - WL12XX_TCXOCLOCK_33_6 = 7, /* 33.6 MHz */
168 -};
169 -
170 struct wl1251_platform_data {
171 void (*set_power)(bool enable);
172 /* SDIO only: IRQ number if WLAN_IRQ line is used, 0 for SDIO IRQs */
173 @@ -57,8 +35,9 @@ struct wl1251_platform_data {
174
175 struct wl12xx_platform_data {
176 int irq;
177 - int board_ref_clock;
178 - int board_tcxo_clock;
179 + int ref_clock_freq; /* in Hertz */
180 + bool ref_clock_xtal; /* specify whether the clock is XTAL or not */
181 + int tcxo_clock_freq; /* in Hertz, tcxo is always XTAL */
182 };
183
184 #ifdef CONFIG_WILINK_PLATFORM_DATA
185 --- a/arch/arm/mach-omap2/pdata-quirks.c
186 +++ b/arch/arm/mach-omap2/pdata-quirks.c
187 @@ -50,8 +50,8 @@ static void __init __used legacy_init_wl
188 {
189 int res;
190
191 - wl12xx.board_ref_clock = ref_clock;
192 - wl12xx.board_tcxo_clock = tcxo_clock;
193 + wl12xx.ref_clock_freq = ref_clock;
194 + wl12xx.tcxo_clock_freq = tcxo_clock;
195 wl12xx.irq = gpio_to_irq(gpio);
196
197 res = wl12xx_set_platform_data(&wl12xx);
198 @@ -85,12 +85,12 @@ static void __init omap3_igep0020_legacy
199
200 static void __init omap3_evm_legacy_init(void)
201 {
202 - legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 149);
203 + legacy_init_wl12xx(38400000, 0, 149);
204 }
205
206 static void __init omap3_zoom_legacy_init(void)
207 {
208 - legacy_init_wl12xx(WL12XX_REFCLOCK_26, 0, 162);
209 + legacy_init_wl12xx(26000000, 0, 162);
210 }
211 #endif /* CONFIG_ARCH_OMAP3 */
212
213 @@ -98,15 +98,15 @@ static void __init omap3_zoom_legacy_ini
214 static void __init omap4_sdp_legacy_init(void)
215 {
216 omap_4430sdp_display_init_of();
217 - legacy_init_wl12xx(WL12XX_REFCLOCK_26,
218 - WL12XX_TCXOCLOCK_26, 53);
219 + legacy_init_wl12xx(26000000,
220 + 26000000, 53);
221 }
222
223 static void __init omap4_panda_legacy_init(void)
224 {
225 omap4_panda_display_init_of();
226 legacy_init_ehci_clk("auxclk3_ck");
227 - legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 53);
228 + legacy_init_wl12xx(38400000, 0, 53);
229 }
230 #endif
231
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