git.openwrt.org Git - openwrt/staging/hauke.git/blob

   1 From 8b7091e1795e50b559b7896b71c45df4fc83353b Mon Sep 17 00:00:00 2001
   2 From: Maxime Ripard <maxime@cerno.tech>
   3 Date: Fri, 10 Dec 2021 15:00:04 +0100
   4 Subject: [PATCH] drm/vc4: hdmi: Take bpp into account for the
   5  scrambler
   6
   7 The current code only base its decision for whether the scrambler must be
   8 enabled or not on the pixel clock of the mode, but doesn't take the bits
   9 per color into account.
  10
  11 Let's leverage the new function to compute the clock rate in the
  12 scrambler setup code.
  13
  14 Signed-off-by: Maxime Ripard <maxime@cerno.tech>
  15 ---
  16  drivers/gpu/drm/vc4/vc4_hdmi.c | 17 +++++++++++++----
  17  drivers/gpu/drm/vc4/vc4_hdmi.h |  5 +++++
  18  2 files changed, 18 insertions(+), 4 deletions(-)
  19
  20 --- a/drivers/gpu/drm/vc4/vc4_hdmi.c
  21 +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
  22 @@ -103,9 +103,17 @@
  23
  24  #define HDMI_14_MAX_TMDS_CLK   (340 * 1000 * 1000)
  25
  26 -static bool vc4_hdmi_mode_needs_scrambling(const struct drm_display_mode *mode)
  27 +
  28 +static unsigned long long
  29 +vc4_hdmi_encoder_compute_mode_clock(const struct drm_display_mode *mode,
  30 +                                   unsigned int bpc);
  31 +
  32 +static bool vc4_hdmi_mode_needs_scrambling(const struct drm_display_mode *mode,
  33 +                                          unsigned int bpc)
  34  {
  35 -       return (mode->clock * 1000) > HDMI_14_MAX_TMDS_CLK;
  36 +       unsigned long long clock = vc4_hdmi_encoder_compute_mode_clock(mode, bpc);
  37 +
  38 +       return clock > HDMI_14_MAX_TMDS_CLK;
  39  }
  40
  41  static bool vc4_hdmi_is_full_range_rgb(struct vc4_hdmi *vc4_hdmi,
  42 @@ -277,7 +285,7 @@ static int vc4_hdmi_connector_get_modes(
  43                 struct drm_display_mode *mode;
  44
  45                 list_for_each_entry(mode, &connector->probed_modes, head) {
  46 -                       if (vc4_hdmi_mode_needs_scrambling(mode)) {
  47 +                       if (vc4_hdmi_mode_needs_scrambling(mode, 8)) {
  48                                 drm_warn_once(drm, "The core clock cannot reach frequencies high enough to support 4k @ 60Hz.");
  49                                 drm_warn_once(drm, "Please change your config.txt file to add hdmi_enable_4kp60.");
  50                         }
  51 @@ -628,7 +636,7 @@ static void vc4_hdmi_enable_scrambling(s
  52         if (!vc4_hdmi_supports_scrambling(encoder, mode))
  53                 return;
  54
  55 -       if (!vc4_hdmi_mode_needs_scrambling(mode))
  56 +       if (!vc4_hdmi_mode_needs_scrambling(mode, vc4_hdmi->output_bpc))
  57                 return;
  58
  59         drm_scdc_set_high_tmds_clock_ratio(vc4_hdmi->ddc, true);
  60 @@ -1246,6 +1254,7 @@ static void vc4_hdmi_encoder_atomic_mode
  61         struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
  62
  63         mutex_lock(&vc4_hdmi->mutex);
  64 +       vc4_hdmi->output_bpc = conn_state->max_bpc;
  65         memcpy(&vc4_hdmi->saved_adjusted_mode,
  66                &crtc_state->adjusted_mode,
  67                sizeof(vc4_hdmi->saved_adjusted_mode));
  68 --- a/drivers/gpu/drm/vc4/vc4_hdmi.h
  69 +++ b/drivers/gpu/drm/vc4/vc4_hdmi.h
  70 @@ -221,6 +221,11 @@ struct vc4_hdmi {
  71          */
  72         bool scdc_enabled;
  73
  74 +       /**
  75 +        * @output_bpc: BPC currently being used. Protected by @mutex.
  76 +        */
  77 +       unsigned int output_bpc;
  78 +
  79         /* VC5 debugfs regset */
  80         struct debugfs_regset32 cec_regset;
  81         struct debugfs_regset32 csc_regset;