db0952211e6ec0b28ed7c49a3cecffc13f93a0b8
[openwrt/staging/ldir.git] /
1 From 7ca989eafbd6ce1c216a775556c4893baab1959b Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
3 Date: Wed, 24 Mar 2021 09:19:13 +0100
4 Subject: [PATCH 12/22] dt-bindings: add BCM6362 GPIO sysctl binding
5 documentation
6 MIME-Version: 1.0
7 Content-Type: text/plain; charset=UTF-8
8 Content-Transfer-Encoding: 8bit
9
10 Add binding documentation for the GPIO sysctl found in BCM6362 SoCs.
11
12 Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
13 Reviewed-by: Rob Herring <robh@kernel.org>
14 Link: https://lore.kernel.org/r/20210324081923.20379-13-noltari@gmail.com
15 Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
16 ---
17 .../mfd/brcm,bcm6362-gpio-sysctl.yaml | 236 ++++++++++++++++++
18 1 file changed, 236 insertions(+)
19 create mode 100644 Documentation/devicetree/bindings/mfd/brcm,bcm6362-gpio-sysctl.yaml
20
21 --- /dev/null
22 +++ b/Documentation/devicetree/bindings/mfd/brcm,bcm6362-gpio-sysctl.yaml
23 @@ -0,0 +1,236 @@
24 +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
25 +%YAML 1.2
26 +---
27 +$id: http://devicetree.org/schemas/mfd/brcm,bcm6362-gpio-sysctl.yaml#
28 +$schema: http://devicetree.org/meta-schemas/core.yaml#
29 +
30 +title: Broadcom BCM6362 GPIO System Controller Device Tree Bindings
31 +
32 +maintainers:
33 + - Álvaro Fernández Rojas <noltari@gmail.com>
34 + - Jonas Gorski <jonas.gorski@gmail.com>
35 +
36 +description:
37 + Broadcom BCM6362 SoC GPIO system controller which provides a register map
38 + for controlling the GPIO and pins of the SoC.
39 +
40 +properties:
41 + "#address-cells": true
42 +
43 + "#size-cells": true
44 +
45 + compatible:
46 + items:
47 + - const: brcm,bcm6362-gpio-sysctl
48 + - const: syscon
49 + - const: simple-mfd
50 +
51 + ranges:
52 + maxItems: 1
53 +
54 + reg:
55 + maxItems: 1
56 +
57 +patternProperties:
58 + "^gpio@[0-9a-f]+$":
59 + # Child node
60 + type: object
61 + $ref: "../gpio/brcm,bcm6345-gpio.yaml"
62 + description:
63 + GPIO controller for the SoC GPIOs. This child node definition
64 + should follow the bindings specified in
65 + Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.yaml.
66 +
67 + "^pinctrl@[0-9a-f]+$":
68 + # Child node
69 + type: object
70 + $ref: "../pinctrl/brcm,bcm6362-pinctrl.yaml"
71 + description:
72 + Pin controller for the SoC pins. This child node definition
73 + should follow the bindings specified in
74 + Documentation/devicetree/bindings/pinctrl/brcm,bcm6362-pinctrl.yaml.
75 +
76 +required:
77 + - "#address-cells"
78 + - compatible
79 + - ranges
80 + - reg
81 + - "#size-cells"
82 +
83 +additionalProperties: false
84 +
85 +examples:
86 + - |
87 + syscon@10000080 {
88 + #address-cells = <1>;
89 + #size-cells = <1>;
90 + compatible = "brcm,bcm6362-gpio-sysctl", "syscon", "simple-mfd";
91 + reg = <0x10000080 0x80>;
92 + ranges = <0 0x10000080 0x80>;
93 +
94 + gpio@0 {
95 + compatible = "brcm,bcm6362-gpio";
96 + reg-names = "dirout", "dat";
97 + reg = <0x0 0x8>, <0x8 0x8>;
98 +
99 + gpio-controller;
100 + gpio-ranges = <&pinctrl 0 0 48>;
101 + #gpio-cells = <2>;
102 + };
103 +
104 + pinctrl: pinctrl@18 {
105 + compatible = "brcm,bcm6362-pinctrl";
106 + reg = <0x18 0x10>, <0x38 0x4>;
107 +
108 + pinctrl_usb_device_led: usb_device_led-pins {
109 + function = "usb_device_led";
110 + pins = "gpio0";
111 + };
112 +
113 + pinctrl_sys_irq: sys_irq-pins {
114 + function = "sys_irq";
115 + pins = "gpio1";
116 + };
117 +
118 + pinctrl_serial_led: serial_led-pins {
119 + pinctrl_serial_led_clk: serial_led_clk-pins {
120 + function = "serial_led_clk";
121 + pins = "gpio2";
122 + };
123 +
124 + pinctrl_serial_led_data: serial_led_data-pins {
125 + function = "serial_led_data";
126 + pins = "gpio3";
127 + };
128 + };
129 +
130 + pinctrl_robosw_led_data: robosw_led_data-pins {
131 + function = "robosw_led_data";
132 + pins = "gpio4";
133 + };
134 +
135 + pinctrl_robosw_led_clk: robosw_led_clk-pins {
136 + function = "robosw_led_clk";
137 + pins = "gpio5";
138 + };
139 +
140 + pinctrl_robosw_led0: robosw_led0-pins {
141 + function = "robosw_led0";
142 + pins = "gpio6";
143 + };
144 +
145 + pinctrl_robosw_led1: robosw_led1-pins {
146 + function = "robosw_led1";
147 + pins = "gpio7";
148 + };
149 +
150 + pinctrl_inet_led: inet_led-pins {
151 + function = "inet_led";
152 + pins = "gpio8";
153 + };
154 +
155 + pinctrl_spi_cs2: spi_cs2-pins {
156 + function = "spi_cs2";
157 + pins = "gpio9";
158 + };
159 +
160 + pinctrl_spi_cs3: spi_cs3-pins {
161 + function = "spi_cs3";
162 + pins = "gpio10";
163 + };
164 +
165 + pinctrl_ntr_pulse: ntr_pulse-pins {
166 + function = "ntr_pulse";
167 + pins = "gpio11";
168 + };
169 +
170 + pinctrl_uart1_scts: uart1_scts-pins {
171 + function = "uart1_scts";
172 + pins = "gpio12";
173 + };
174 +
175 + pinctrl_uart1_srts: uart1_srts-pins {
176 + function = "uart1_srts";
177 + pins = "gpio13";
178 + };
179 +
180 + pinctrl_uart1: uart1-pins {
181 + pinctrl_uart1_sdin: uart1_sdin-pins {
182 + function = "uart1_sdin";
183 + pins = "gpio14";
184 + };
185 +
186 + pinctrl_uart1_sdout: uart1_sdout-pins {
187 + function = "uart1_sdout";
188 + pins = "gpio15";
189 + };
190 + };
191 +
192 + pinctrl_adsl_spi: adsl_spi-pins {
193 + pinctrl_adsl_spi_miso: adsl_spi_miso-pins {
194 + function = "adsl_spi_miso";
195 + pins = "gpio16";
196 + };
197 +
198 + pinctrl_adsl_spi_mosi: adsl_spi_mosi-pins {
199 + function = "adsl_spi_mosi";
200 + pins = "gpio17";
201 + };
202 +
203 + pinctrl_adsl_spi_clk: adsl_spi_clk-pins {
204 + function = "adsl_spi_clk";
205 + pins = "gpio18";
206 + };
207 +
208 + pinctrl_adsl_spi_cs: adsl_spi_cs-pins {
209 + function = "adsl_spi_cs";
210 + pins = "gpio19";
211 + };
212 + };
213 +
214 + pinctrl_ephy0_led: ephy0_led-pins {
215 + function = "ephy0_led";
216 + pins = "gpio20";
217 + };
218 +
219 + pinctrl_ephy1_led: ephy1_led-pins {
220 + function = "ephy1_led";
221 + pins = "gpio21";
222 + };
223 +
224 + pinctrl_ephy2_led: ephy2_led-pins {
225 + function = "ephy2_led";
226 + pins = "gpio22";
227 + };
228 +
229 + pinctrl_ephy3_led: ephy3_led-pins {
230 + function = "ephy3_led";
231 + pins = "gpio23";
232 + };
233 +
234 + pinctrl_ext_irq0: ext_irq0-pins {
235 + function = "ext_irq0";
236 + pins = "gpio24";
237 + };
238 +
239 + pinctrl_ext_irq1: ext_irq1-pins {
240 + function = "ext_irq1";
241 + pins = "gpio25";
242 + };
243 +
244 + pinctrl_ext_irq2: ext_irq2-pins {
245 + function = "ext_irq2";
246 + pins = "gpio26";
247 + };
248 +
249 + pinctrl_ext_irq3: ext_irq3-pins {
250 + function = "ext_irq3";
251 + pins = "gpio27";
252 + };
253 +
254 + pinctrl_nand: nand-pins {
255 + function = "nand";
256 + group = "nand_grp";
257 + };
258 + };
259 + };