da3ec8d3d858a0c6604bca2e63b5c59459f6401b
[openwrt/staging/pepe2k.git] /
1 From 0d9bc2f22dc418c4573ded86278e55f97d029dca Mon Sep 17 00:00:00 2001
2 From: Viorel Suman <viorel.suman@nxp.com>
3 Date: Fri, 9 Feb 2018 11:39:58 +0200
4 Subject: [PATCH] MLK-17528-3: ASoC: fsl_sai: Set clock rate in "set_sysclk"
5 API
6
7 Set the requested clock rate in "set_sysclk" for specified clock id.
8
9 Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
10 Suggested-by: Shengjiu Wang <shengjiu.wang@nxp.com>
11 Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
12 Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
13 ---
14 sound/soc/fsl/fsl_sai.c | 19 +++++++++++++++++++
15 1 file changed, 19 insertions(+)
16
17 --- a/sound/soc/fsl/fsl_sai.c
18 +++ b/sound/soc/fsl/fsl_sai.c
19 @@ -245,6 +245,25 @@ static int fsl_sai_set_dai_sysclk(struct
20 return 0;
21 }
22
23 + if (freq > 0) {
24 + if (clk_id < 0 || clk_id >= FSL_SAI_MCLK_MAX) {
25 + dev_err(cpu_dai->dev, "Unknown clock id: %d\n", clk_id);
26 + return -EINVAL;
27 + }
28 +
29 + if (IS_ERR_OR_NULL(sai->mclk_clk[clk_id])) {
30 + dev_err(cpu_dai->dev, "Unassigned clock: %d\n", clk_id);
31 + return -EINVAL;
32 + }
33 +
34 + ret = clk_set_rate(sai->mclk_clk[clk_id], freq);
35 + if (ret < 0) {
36 + dev_err(cpu_dai->dev, "failed to set clock rate (%u): %d\n",
37 + freq, ret);
38 + return ret;
39 + }
40 + }
41 +
42 ret = fsl_sai_set_dai_sysclk_tr(cpu_dai, clk_id, freq,
43 FSL_FMT_TRANSMITTER);
44 if (ret) {