git.openwrt.org Git - openwrt/staging/pepe2k.git/blob

   1 From 20684f46eb962173b57ba2d70f9f2e028c95c4c9 Mon Sep 17 00:00:00 2001
   2 From: Jonathan Bell <jonathan@raspberrypi.com>
   3 Date: Wed, 24 Jan 2024 16:28:19 +0000
   4 Subject: [PATCH 0853/1085] drivers: usb: dwc3: add FS/LS bus instance parkmode
   5  disable bit
   6
   7 There are three parkmode disable bits, one for each bus instance type.
   8 Add FS/LS and parse the quirk out of DT. Also update the slightly
   9 mangled quirk descriptions.
  10
  11 Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  12 ---
  13  drivers/usb/dwc3/core.c |  5 +++++
  14  drivers/usb/dwc3/core.h | 12 ++++++++----
  15  2 files changed, 13 insertions(+), 4 deletions(-)
  16
  17 --- a/drivers/usb/dwc3/core.c
  18 +++ b/drivers/usb/dwc3/core.c
  19 @@ -1351,6 +1351,9 @@ static int dwc3_core_init(struct dwc3 *d
  20                 if (dwc->parkmode_disable_hs_quirk)
  21                         reg |= DWC3_GUCTL1_PARKMODE_DISABLE_HS;
  22
  23 +               if (dwc->parkmode_disable_fsls_quirk)
  24 +                       reg |= DWC3_GUCTL1_PARKMODE_DISABLE_FSLS;
  25 +
  26                 if (DWC3_VER_IS_WITHIN(DWC3, 290A, ANY) &&
  27                     (dwc->maximum_speed == USB_SPEED_HIGH ||
  28                      dwc->maximum_speed == USB_SPEED_FULL))
  29 @@ -1649,6 +1652,8 @@ static void dwc3_get_properties(struct d
  30                                 "snps,parkmode-disable-ss-quirk");
  31         dwc->parkmode_disable_hs_quirk = device_property_read_bool(dev,
  32                                 "snps,parkmode-disable-hs-quirk");
  33 +       dwc->parkmode_disable_fsls_quirk = device_property_read_bool(dev,
  34 +                               "snps,parkmode-disable-fsls-quirk");
  35         dwc->gfladj_refclk_lpm_sel = device_property_read_bool(dev,
  36                                 "snps,gfladj-refclk-lpm-sel-quirk");
  37
  38 --- a/drivers/usb/dwc3/core.h
  39 +++ b/drivers/usb/dwc3/core.h
  40 @@ -271,6 +271,7 @@
  41  #define DWC3_GUCTL1_DEV_L1_EXIT_BY_HW          BIT(24)
  42  #define DWC3_GUCTL1_PARKMODE_DISABLE_SS                BIT(17)
  43  #define DWC3_GUCTL1_PARKMODE_DISABLE_HS                BIT(16)
  44 +#define DWC3_GUCTL1_PARKMODE_DISABLE_FSLS      BIT(15)
  45  #define DWC3_GUCTL1_RESUME_OPMODE_HS_HOST      BIT(10)
  46
  47  /* Global Status Register */
  48 @@ -1115,10 +1116,12 @@ struct dwc3_scratchpad_array {
  49   *                     generation after resume from suspend.
  50   * @ulpi_ext_vbus_drv: Set to confiure the upli chip to drives CPEN pin
  51   *                     VBUS with an external supply.
  52 - * @parkmode_disable_ss_quirk: set if we need to disable all SuperSpeed
  53 - *                     instances in park mode.
  54 - * @parkmode_disable_hs_quirk: set if we need to disable all HishSpeed
  55 - *                     instances in park mode.
  56 + * @parkmode_disable_ss_quirk: If set, disable park mode feature for all
  57 + *                     Superspeed instances.
  58 + * @parkmode_disable_hs_quirk: If set, disable park mode feature for all
  59 + *                     Highspeed instances.
  60 + * @parkmode_disable_fsls_quirk: If set, disable park mode feature for all
  61 + *                     Full/Lowspeed instances.
  62   * @tx_de_emphasis_quirk: set if we enable Tx de-emphasis quirk
  63   * @tx_de_emphasis: Tx de-emphasis value
  64   *     0       - -6dB de-emphasis
  65 @@ -1342,6 +1345,7 @@ struct dwc3 {
  66         unsigned                ulpi_ext_vbus_drv:1;
  67         unsigned                parkmode_disable_ss_quirk:1;
  68         unsigned                parkmode_disable_hs_quirk:1;
  69 +       unsigned                parkmode_disable_fsls_quirk:1;
  70         unsigned                gfladj_refclk_lpm_sel:1;
  71
  72         unsigned                tx_de_emphasis_quirk:1;