d867ef561e15a00d7f62e5f91ddc5bbfecde2a73
[openwrt/staging/stintel.git] /
1 From 86608c5578b7a276e0edcedc976c604e283fd177 Mon Sep 17 00:00:00 2001
2 From: Marc Kleine-Budde <mkl@pengutronix.de>
3 Date: Fri, 1 Mar 2019 11:12:13 +0100
4 Subject: [PATCH] can: flexcan: rename macro FLEXCAN_IFLAG_MB() ->
5 FLEXCAN_IFLAG2_MB()
6
7 The macro FLEXCAN_IFLAG_MB() is always used for the iflag2 register, so
8 rename it to FLEXCAN_IFLAG2_MB()
9
10 Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
11 ---
12 drivers/net/can/flexcan.c | 10 +++++-----
13 1 file changed, 5 insertions(+), 5 deletions(-)
14
15 --- a/drivers/net/can/flexcan.c
16 +++ b/drivers/net/can/flexcan.c
17 @@ -142,7 +142,7 @@
18 #define FLEXCAN_TX_MB_RESERVED_OFF_FIFO 8
19 #define FLEXCAN_TX_MB_RESERVED_OFF_TIMESTAMP 0
20 #define FLEXCAN_RX_MB_OFF_TIMESTAMP_FIRST (FLEXCAN_TX_MB_RESERVED_OFF_TIMESTAMP + 1)
21 -#define FLEXCAN_IFLAG_MB(x) BIT((x) & 0x1f)
22 +#define FLEXCAN_IFLAG2_MB(x) BIT((x) & 0x1f)
23 #define FLEXCAN_IFLAG_RX_FIFO_OVERFLOW BIT(7)
24 #define FLEXCAN_IFLAG_RX_FIFO_WARN BIT(6)
25 #define FLEXCAN_IFLAG_RX_FIFO_AVAILABLE BIT(5)
26 @@ -881,7 +881,7 @@ static inline u64 flexcan_read_reg_iflag
27 u32 iflag1, iflag2;
28
29 iflag2 = priv->read(&regs->iflag2) & priv->reg_imask2_default &
30 - ~FLEXCAN_IFLAG_MB(priv->tx_mb_idx);
31 + ~FLEXCAN_IFLAG2_MB(priv->tx_mb_idx);
32 iflag1 = priv->read(&regs->iflag1) & priv->reg_imask1_default;
33
34 return (u64)iflag2 << 32 | iflag1;
35 @@ -931,7 +931,7 @@ static irqreturn_t flexcan_irq(int irq,
36 reg_iflag2 = priv->read(&regs->iflag2);
37
38 /* transmission complete interrupt */
39 - if (reg_iflag2 & FLEXCAN_IFLAG_MB(priv->tx_mb_idx)) {
40 + if (reg_iflag2 & FLEXCAN_IFLAG2_MB(priv->tx_mb_idx)) {
41 u32 reg_ctrl = priv->read(&priv->tx_mb->can_ctrl);
42
43 handled = IRQ_HANDLED;
44 @@ -943,7 +943,7 @@ static irqreturn_t flexcan_irq(int irq,
45 /* after sending a RTR frame MB is in RX mode */
46 priv->write(FLEXCAN_MB_CODE_TX_INACTIVE,
47 &priv->tx_mb->can_ctrl);
48 - priv->write(FLEXCAN_IFLAG_MB(priv->tx_mb_idx), &regs->iflag2);
49 + priv->write(FLEXCAN_IFLAG2_MB(priv->tx_mb_idx), &regs->iflag2);
50 netif_wake_queue(dev);
51 }
52
53 @@ -1321,7 +1321,7 @@ static int flexcan_open(struct net_devic
54 priv->tx_mb = flexcan_get_mb(priv, priv->tx_mb_idx);
55
56 priv->reg_imask1_default = 0;
57 - priv->reg_imask2_default = FLEXCAN_IFLAG_MB(priv->tx_mb_idx);
58 + priv->reg_imask2_default = FLEXCAN_IFLAG2_MB(priv->tx_mb_idx);
59
60 priv->offload.mailbox_read = flexcan_mailbox_read;
61