git.openwrt.org Git - openwrt/staging/ansuel.git/blob

   1 From 9475cc7ac31503521af95e38151e9d856e8ff30b Mon Sep 17 00:00:00 2001
   2 From: Bitterblue Smith <rtl8821cerfe2@gmail.com>
   3 Date: Sun, 31 Dec 2023 00:45:54 +0200
   4 Subject: [PATCH 1/2] wifi: rtl8xxxu: Fix LED control code of RTL8192FU
   5
   6 Some devices, like the Comfast CF-826F, use LED1, which already works.
   7 Others, like Asus USB-N13 C1, use LED0, which doesn't work correctly.
   8
   9 Write the right values to the LED control registers to make LED0 work
  10 as well.
  11
  12 This is unfortunately tested only with the Comfast CF-826F.
  13
  14 Signed-off-by: Bitterblue Smith <rtl8821cerfe2@gmail.com>
  15 Reviewed-by: Ping-Ke Shih <pkshih@realtek.com>
  16 Signed-off-by: Kalle Valo <kvalo@kernel.org>
  17 Link: https://msgid.link/7a2c3158-3a45-4466-b11e-fc09802b20e2@gmail.com
  18 ---
  19  .../realtek/rtl8xxxu/rtl8xxxu_8192f.c         | 32 +++++++++++++------
  20  .../wireless/realtek/rtl8xxxu/rtl8xxxu_regs.h | 15 +++++++++
  21  2 files changed, 38 insertions(+), 9 deletions(-)
  22
  23 --- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192f.c
  24 +++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8192f.c
  25 @@ -2014,26 +2014,40 @@ static int rtl8192fu_led_brightness_set(
  26         struct rtl8xxxu_priv *priv = container_of(led_cdev,
  27                                                   struct rtl8xxxu_priv,
  28                                                   led_cdev);
  29 -       u16 ledcfg;
  30 +       u32 ledcfg;
  31
  32         /* Values obtained by observing the USB traffic from the Windows driver. */
  33         rtl8xxxu_write32(priv, REG_SW_GPIO_SHARE_CTRL_0, 0x20080);
  34         rtl8xxxu_write32(priv, REG_SW_GPIO_SHARE_CTRL_1, 0x1b0000);
  35
  36 -       ledcfg = rtl8xxxu_read16(priv, REG_LEDCFG0);
  37 +       ledcfg = rtl8xxxu_read32(priv, REG_LEDCFG0);
  38 +
  39 +       /* Comfast CF-826F uses LED1. Asus USB-N13 C1 uses LED0. Set both. */
  40 +
  41 +       u32p_replace_bits(&ledcfg, LED_GPIO_ENABLE, LEDCFG0_LED2EN);
  42 +       u32p_replace_bits(&ledcfg, LED_IO_MODE_OUTPUT, LEDCFG0_LED0_IO_MODE);
  43 +       u32p_replace_bits(&ledcfg, LED_IO_MODE_OUTPUT, LEDCFG0_LED1_IO_MODE);
  44
  45         if (brightness == LED_OFF) {
  46 -               /* Value obtained like above. */
  47 -               ledcfg = BIT(1) | BIT(7);
  48 +               u32p_replace_bits(&ledcfg, LED_MODE_SW_CTRL, LEDCFG0_LED0CM);
  49 +               u32p_replace_bits(&ledcfg, LED_SW_OFF, LEDCFG0_LED0SV);
  50 +               u32p_replace_bits(&ledcfg, LED_MODE_SW_CTRL, LEDCFG0_LED1CM);
  51 +               u32p_replace_bits(&ledcfg, LED_SW_OFF, LEDCFG0_LED1SV);
  52         } else if (brightness == LED_ON) {
  53 -               /* Value obtained like above. */
  54 -               ledcfg = BIT(1) | BIT(7) | BIT(11);
  55 +               u32p_replace_bits(&ledcfg, LED_MODE_SW_CTRL, LEDCFG0_LED0CM);
  56 +               u32p_replace_bits(&ledcfg, LED_SW_ON, LEDCFG0_LED0SV);
  57 +               u32p_replace_bits(&ledcfg, LED_MODE_SW_CTRL, LEDCFG0_LED1CM);
  58 +               u32p_replace_bits(&ledcfg, LED_SW_ON, LEDCFG0_LED1SV);
  59         } else if (brightness == RTL8XXXU_HW_LED_CONTROL) {
  60 -               /* Value obtained by brute force. */
  61 -               ledcfg = BIT(8) | BIT(9);
  62 +               u32p_replace_bits(&ledcfg, LED_MODE_TX_OR_RX_EVENTS,
  63 +                                 LEDCFG0_LED0CM);
  64 +               u32p_replace_bits(&ledcfg, LED_SW_OFF, LEDCFG0_LED0SV);
  65 +               u32p_replace_bits(&ledcfg, LED_MODE_TX_OR_RX_EVENTS,
  66 +                                 LEDCFG0_LED1CM);
  67 +               u32p_replace_bits(&ledcfg, LED_SW_OFF, LEDCFG0_LED1SV);
  68         }
  69
  70 -       rtl8xxxu_write16(priv, REG_LEDCFG0, ledcfg);
  71 +       rtl8xxxu_write32(priv, REG_LEDCFG0, ledcfg);
  72
  73         return 0;
  74  }
  75 --- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_regs.h
  76 +++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_regs.h
  77 @@ -146,6 +146,21 @@
  78  #define  GPIO_INTM_EDGE_TRIG_IRQ       BIT(9)
  79
  80  #define REG_LEDCFG0                    0x004c
  81 +#define  LEDCFG0_LED0CM                        GENMASK(2, 0)
  82 +#define  LEDCFG0_LED1CM                        GENMASK(10, 8)
  83 +#define   LED_MODE_SW_CTRL             0x0
  84 +#define   LED_MODE_TX_OR_RX_EVENTS     0x3
  85 +#define  LEDCFG0_LED0SV                        BIT(3)
  86 +#define  LEDCFG0_LED1SV                        BIT(11)
  87 +#define   LED_SW_OFF                   0x0
  88 +#define   LED_SW_ON                    0x1
  89 +#define  LEDCFG0_LED0_IO_MODE          BIT(7)
  90 +#define  LEDCFG0_LED1_IO_MODE          BIT(15)
  91 +#define   LED_IO_MODE_OUTPUT           0x0
  92 +#define   LED_IO_MODE_INPUT            0x1
  93 +#define  LEDCFG0_LED2EN                        BIT(21)
  94 +#define   LED_GPIO_DISABLE             0x0
  95 +#define   LED_GPIO_ENABLE              0x1
  96  #define  LEDCFG0_DPDT_SELECT           BIT(23)
  97  #define REG_LEDCFG1                    0x004d
  98  #define  LEDCFG1_HW_LED_CONTROL                BIT(1)