git.openwrt.org Git - openwrt/staging/blogic.git/blob

   1 From 0cd4e90cb2dec02ff859f5c98f744f43a23aea65 Mon Sep 17 00:00:00 2001
   2 From: Vignesh Viswanathan <quic_viswanat@quicinc.com>
   3 Date: Fri, 26 May 2023 16:36:53 +0530
   4 Subject: [PATCH] arm64: dts: qcom: add few more reserved memory region
   5
   6 In IPQ SoCs, bootloader will collect the system RAM contents upon crash
   7 for the post morterm analysis. If we don't reserve the memory region used
   8 by bootloader, obviously linux will consume it and upon next boot on
   9 crash, bootloader will be loaded in the same region, which will lead to
  10 loose some of the data, sometimes we may miss out critical information.
  11 So lets reserve the region used by the bootloader.
  12
  13 Similarly SBL copies some data into the reserved region and it will be
  14 used in the crash scenario. So reserve 1MB for SBL as well.
  15
  16 While at it, drop the size padding in the reserved memory region,
  17 wherever applicable.
  18
  19 Signed-off-by: Vignesh Viswanathan <quic_viswanat@quicinc.com>
  20 Signed-off-by: Bjorn Andersson <andersson@kernel.org>
  21 Link: https://lore.kernel.org/r/20230526110653.27777-4-quic_viswanat@quicinc.com
  22 ---
  23  arch/arm64/boot/dts/qcom/ipq6018.dtsi | 16 +++++++++++++---
  24  arch/arm64/boot/dts/qcom/ipq8074.dtsi | 14 ++++++++++++--
  25  2 files changed, 25 insertions(+), 5 deletions(-)
  26
  27 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
  28 +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
  29 @@ -154,18 +154,28 @@
  30                         no-map;
  31                 };
  32
  33 +               bootloader@4a100000 {
  34 +                       reg = <0x0 0x4a100000 0x0 0x400000>;
  35 +                       no-map;
  36 +               };
  37 +
  38 +               sbl@4a500000 {
  39 +                       reg = <0x0 0x4a500000 0x0 0x100000>;
  40 +                       no-map;
  41 +               };
  42 +
  43                 tz: memory@4a600000 {
  44 -                       reg = <0x0 0x4a600000 0x0 0x00400000>;
  45 +                       reg = <0x0 0x4a600000 0x0 0x400000>;
  46                         no-map;
  47                 };
  48
  49                 smem_region: memory@4aa00000 {
  50 -                       reg = <0x0 0x4aa00000 0x0 0x00100000>;
  51 +                       reg = <0x0 0x4aa00000 0x0 0x100000>;
  52                         no-map;
  53                 };
  54
  55                 q6_region: memory@4ab00000 {
  56 -                       reg = <0x0 0x4ab00000 0x0 0x05500000>;
  57 +                       reg = <0x0 0x4ab00000 0x0 0x5500000>;
  58                         no-map;
  59                 };
  60         };
  61 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
  62 +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
  63 @@ -85,17 +85,27 @@
  64                 #size-cells = <2>;
  65                 ranges;
  66
  67 +               bootloader@4a600000 {
  68 +                       reg = <0x0 0x4a600000 0x0 0x400000>;
  69 +                       no-map;
  70 +               };
  71 +
  72 +               sbl@4aa00000 {
  73 +                       reg = <0x0 0x4aa00000 0x0 0x100000>;
  74 +                       no-map;
  75 +               };
  76 +
  77                 smem@4ab00000 {
  78                         compatible = "qcom,smem";
  79 -                       reg = <0x0 0x4ab00000 0x0 0x00100000>;
  80 +                       reg = <0x0 0x4ab00000 0x0 0x100000>;
  81                         no-map;
  82
  83                         hwlocks = <&tcsr_mutex 3>;
  84                 };
  85
  86                 memory@4ac00000 {
  87 +                       reg = <0x0 0x4ac00000 0x0 0x400000>;
  88                         no-map;
  89 -                       reg = <0x0 0x4ac00000 0x0 0x00400000>;
  90                 };
  91         };
  92