d054745455d9af5ba33cc0d6bd25b66521704c4a
[openwrt/staging/mkresin.git] /
1 From 01af235657e4d8f5f87b5e06bcf42baf53e1ff8d Mon Sep 17 00:00:00 2001
2 From: Florinel Iordache <florinel.iordache@nxp.com>
3 Date: Mon, 5 Nov 2018 17:03:04 +0200
4 Subject: [PATCH] arm64: dts: lx2160: DPMAC connections to backplane PHYs
5 example
6
7 This is an example of device tree nodes required to enable 10GBase-KR and 40GBase-KR on LX2160
8
9 Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com>
10 ---
11 arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts | 20 ++++++++++++++++++++
12 1 file changed, 20 insertions(+)
13
14 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
15 +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
16 @@ -202,3 +202,23 @@
17 fsl,lane-reg = <0xE00 0x100>; /* lane G */
18 };
19 };
20 +
21 +/* Update DPMAC connections to 40G backplane PHYs
22 + * &dpmac1 {
23 + * phy-handle = <&pcs_phy1>;
24 + * };
25 + *
26 + * &dpmac2 {
27 + * phy-handle = <&pcs_phy2>;
28 + * };
29 + */
30 +
31 +/* Update DPMAC connections to 10G backplane PHYs
32 + * &dpmac3 {
33 + * phy-handle = <&pcs_phy3>;
34 + * };
35 + *
36 + * &dpmac4 {
37 + * phy-handle = <&pcs_phy4>;
38 + * };
39 + */