git.openwrt.org Git - openwrt/staging/dangole.git/blob

   1 From 20afb6751739264ea41993877de93923911dfdc3 Mon Sep 17 00:00:00 2001
   2 From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
   3 Date: Thu, 6 Oct 2022 14:46:27 +0200
   4 Subject: [PATCH] arm64: dts: qcom: ipq6018: align TLMM pin configuration with
   5  DT schema
   6
   7 DT schema expects TLMM pin configuration nodes to be named with
   8 '-state' suffix and their optional children with '-pins' suffix.
   9
  10 Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
  11 Reviewed-by: Bjorn Andersson <andersson@kernel.org>
  12 Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
  13 Signed-off-by: Bjorn Andersson <andersson@kernel.org>
  14 Link: https://lore.kernel.org/r/20221006124659.217540-3-krzysztof.kozlowski@linaro.org
  15 ---
  16  arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts | 4 ++--
  17  arch/arm64/boot/dts/qcom/ipq6018.dtsi        | 4 ++--
  18  2 files changed, 4 insertions(+), 4 deletions(-)
  19
  20 --- a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
  21 +++ b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
  22 @@ -51,13 +51,13 @@
  23  };
  24
  25  &tlmm {
  26 -       i2c_1_pins: i2c-1-pins {
  27 +       i2c_1_pins: i2c-1-state {
  28                 pins = "gpio42", "gpio43";
  29                 function = "blsp2_i2c";
  30                 drive-strength = <8>;
  31         };
  32
  33 -       spi_0_pins: spi-0-pins {
  34 +       spi_0_pins: spi-0-state {
  35                 pins = "gpio38", "gpio39", "gpio40", "gpio41";
  36                 function = "blsp0_spi";
  37                 drive-strength = <8>;
  38 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
  39 +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
  40 @@ -218,14 +218,14 @@
  41                         interrupt-controller;
  42                         #interrupt-cells = <2>;
  43
  44 -                       serial_3_pins: serial3-pinmux {
  45 +                       serial_3_pins: serial3-state {
  46                                 pins = "gpio44", "gpio45";
  47                                 function = "blsp2_uart";
  48                                 drive-strength = <8>;
  49                                 bias-pull-down;
  50                         };
  51
  52 -                       qpic_pins: qpic-pins {
  53 +                       qpic_pins: qpic-state {
  54                                 pins = "gpio1", "gpio3", "gpio4",
  55                                         "gpio5", "gpio6", "gpio7",
  56                                         "gpio8", "gpio10", "gpio11",