1 From 21400f252a97755579b43a4dc95dd02cd7f0ca75 Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
3 Date: Wed, 3 Sep 2014 22:59:45 +0200
4 Subject: [PATCH 155/158] MIPS: BCM47XX: Make ssb init NVRAM instead of bcm47xx
7 Content-Type: text/plain; charset=UTF-8
8 Content-Transfer-Encoding: 8bit
10 This makes NVRAM code less bcm47xx/ssb specific allowing it to become a
11 standalone driver in the future. A similar patch for bcma will follow
14 Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
15 Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
16 Cc: linux-mips@linux-mips.org
17 Patchwork: https://patchwork.linux-mips.org/patch/7612/
18 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
20 arch/mips/bcm47xx/nvram.c | 30 +++++++---------------
21 arch/mips/include/asm/mach-bcm47xx/bcm47xx_nvram.h | 1 +
22 drivers/ssb/driver_mipscore.c | 14 +++++++++-
23 3 files changed, 23 insertions(+), 22 deletions(-)
25 --- a/arch/mips/bcm47xx/nvram.c
26 +++ b/arch/mips/bcm47xx/nvram.c
27 @@ -98,7 +98,14 @@ found:
31 -static int bcm47xx_nvram_init_from_mem(u32 base, u32 lim)
33 + * On bcm47xx we need access to the NVRAM very early, so we can't use mtd
34 + * subsystem to access flash. We can't even use platform device / driver to
35 + * store memory offset.
36 + * To handle this we provide following symbol. It's supposed to be called as
37 + * soon as we get info about flash device, before any NVRAM entry is needed.
39 +int bcm47xx_nvram_init_from_mem(u32 base, u32 lim)
43 @@ -114,25 +121,6 @@ static int bcm47xx_nvram_init_from_mem(u
47 -#ifdef CONFIG_BCM47XX_SSB
48 -static int nvram_init_ssb(void)
50 - struct ssb_mipscore *mcore = &bcm47xx_bus.ssb.mipscore;
54 - if (mcore->pflash.present) {
55 - base = mcore->pflash.window;
56 - lim = mcore->pflash.window_size;
58 - pr_err("Couldn't find supported flash memory\n");
62 - return bcm47xx_nvram_init_from_mem(base, lim);
66 #ifdef CONFIG_BCM47XX_BCMA
67 static int nvram_init_bcma(void)
69 @@ -168,7 +156,7 @@ static int nvram_init(void)
70 switch (bcm47xx_bus_type) {
71 #ifdef CONFIG_BCM47XX_SSB
72 case BCM47XX_BUS_TYPE_SSB:
73 - return nvram_init_ssb();
76 #ifdef CONFIG_BCM47XX_BCMA
77 case BCM47XX_BUS_TYPE_BCMA:
78 --- a/arch/mips/include/asm/mach-bcm47xx/bcm47xx_nvram.h
79 +++ b/arch/mips/include/asm/mach-bcm47xx/bcm47xx_nvram.h
80 @@ -32,6 +32,7 @@ struct nvram_header {
81 #define NVRAM_MAX_VALUE_LEN 255
82 #define NVRAM_MAX_PARAM_LEN 64
84 +int bcm47xx_nvram_init_from_mem(u32 base, u32 lim);
85 extern int bcm47xx_nvram_getenv(char *name, char *val, size_t val_len);
87 static inline void bcm47xx_nvram_parse_macaddr(char *buf, u8 macaddr[6])
88 --- a/drivers/ssb/driver_mipscore.c
89 +++ b/drivers/ssb/driver_mipscore.c
91 #include <linux/serial_core.h>
92 #include <linux/serial_reg.h>
93 #include <linux/time.h>
94 +#ifdef CONFIG_BCM47XX
95 +#include <bcm47xx_nvram.h>
98 #include "ssb_private.h"
100 @@ -210,6 +213,7 @@ static void ssb_mips_serial_init(struct
101 static void ssb_mips_flash_detect(struct ssb_mipscore *mcore)
103 struct ssb_bus *bus = mcore->dev->bus;
104 + struct ssb_sflash *sflash = &mcore->sflash;
105 struct ssb_pflash *pflash = &mcore->pflash;
107 /* When there is no chipcommon on the bus there is 4MB flash */
108 @@ -242,7 +246,15 @@ static void ssb_mips_flash_detect(struct
112 - if (pflash->present) {
113 + if (sflash->present) {
114 +#ifdef CONFIG_BCM47XX
115 + bcm47xx_nvram_init_from_mem(sflash->window, sflash->size);
117 + } else if (pflash->present) {
118 +#ifdef CONFIG_BCM47XX
119 + bcm47xx_nvram_init_from_mem(pflash->window, pflash->window_size);
122 ssb_pflash_data.width = pflash->buswidth;
123 ssb_pflash_resource.start = pflash->window;
124 ssb_pflash_resource.end = pflash->window + pflash->window_size;