git.openwrt.org Git - openwrt/staging/ansuel.git/blob

   1 From cfad3f71fc450639fc259d576d0903e9132fe34a Mon Sep 17 00:00:00 2001
   2 From: Dom Cobley <popcornmix@gmail.com>
   3 Date: Thu, 25 May 2023 14:48:28 +0100
   4 Subject: [PATCH] dmaengine: bcm2835: Rename to_bcm2711_cbaddr to
   5  to_40bit_cbaddr
   6
   7 As the shifted address also applies to bcm2712,
   8 give the function a more specific name.
   9
  10 Signed-off-by: Dom Cobley <popcornmix@gmail.com>
  11 ---
  12  drivers/dma/bcm2835-dma.c | 16 ++++++++--------
  13  1 file changed, 8 insertions(+), 8 deletions(-)
  14
  15 --- a/drivers/dma/bcm2835-dma.c
  16 +++ b/drivers/dma/bcm2835-dma.c
  17 @@ -390,7 +390,7 @@ static inline uint32_t to_bcm2711_dsti(u
  18                BCM2711_DMA40_BURST_LEN(BCM2835_DMA_GET_BURST_LENGTH(info));
  19  }
  20
  21 -static inline uint32_t to_bcm2711_cbaddr(dma_addr_t addr)
  22 +static inline uint32_t to_40bit_cbaddr(dma_addr_t addr)
  23  {
  24         BUG_ON(addr & 0x1f);
  25         return (addr >> 5);
  26 @@ -573,9 +573,9 @@ static struct bcm2835_desc *bcm2835_dma_
  27                 if (frame && c->is_40bit_channel)
  28                         ((struct bcm2711_dma40_scb *)
  29                          d->cb_list[frame - 1].cb)->next_cb =
  30 -                               to_bcm2711_cbaddr(cb_entry->paddr);
  31 +                               to_40bit_cbaddr(cb_entry->paddr);
  32                 if (frame && !c->is_40bit_channel)
  33 -                       d->cb_list[frame - 1].cb->next = to_bcm2711_cbaddr(cb_entry->paddr);
  34 +                       d->cb_list[frame - 1].cb->next = to_40bit_cbaddr(cb_entry->paddr);
  35
  36                 /* update src and dst and length */
  37                 if (src && (info & BCM2835_DMA_S_INC)) {
  38 @@ -755,14 +755,14 @@ static void bcm2835_dma_start_desc(struc
  39         c->desc = d = to_bcm2835_dma_desc(&vd->tx);
  40
  41         if (c->is_40bit_channel) {
  42 -               writel(to_bcm2711_cbaddr(d->cb_list[0].paddr),
  43 +               writel(to_40bit_cbaddr(d->cb_list[0].paddr),
  44                        c->chan_base + BCM2711_DMA40_CB);
  45                 writel(BCM2711_DMA40_ACTIVE | BCM2711_DMA40_PROT | BCM2711_DMA40_CS_FLAGS(c->dreq),
  46                        c->chan_base + BCM2711_DMA40_CS);
  47         } else {
  48                 writel(BIT(31), c->chan_base + BCM2835_DMA_CS);
  49
  50 -               writel(to_bcm2711_cbaddr(d->cb_list[0].paddr),
  51 +               writel(to_40bit_cbaddr(d->cb_list[0].paddr),
  52                        c->chan_base + BCM2835_DMA_ADDR);
  53                 writel(BCM2835_DMA_ACTIVE | BCM2835_DMA_CS_FLAGS(c->dreq),
  54                        c->chan_base + BCM2835_DMA_CS);
  55 @@ -1130,9 +1130,9 @@ static struct dma_async_tx_descriptor *b
  56         if (c->is_40bit_channel)
  57                 ((struct bcm2711_dma40_scb *)
  58                  d->cb_list[frames - 1].cb)->next_cb =
  59 -                       to_bcm2711_cbaddr(d->cb_list[0].paddr);
  60 +                       to_40bit_cbaddr(d->cb_list[0].paddr);
  61         else
  62 -               d->cb_list[d->frames - 1].cb->next = to_bcm2711_cbaddr(d->cb_list[0].paddr);
  63 +               d->cb_list[d->frames - 1].cb->next = to_40bit_cbaddr(d->cb_list[0].paddr);
  64
  65         return vchan_tx_prep(&c->vc, &d->vd, flags);
  66  }
  67 @@ -1252,7 +1252,7 @@ void bcm2711_dma40_memcpy(dma_addr_t dst
  68         scb->len = size;
  69         scb->next_cb = 0;
  70
  71 -       writel(to_bcm2711_cbaddr(memcpy_scb_dma), memcpy_chan + BCM2711_DMA40_CB);
  72 +       writel(to_40bit_cbaddr(memcpy_scb_dma), memcpy_chan + BCM2711_DMA40_CB);
  73         writel(BCM2711_DMA40_MEMCPY_FLAGS | BCM2711_DMA40_ACTIVE | BCM2711_DMA40_PROT,
  74                memcpy_chan + BCM2711_DMA40_CS);
  75