1 From 620a988813403318023296b61228ee8f3fcdb8e0 Mon Sep 17 00:00:00 2001
2 From: Chuanhong Guo <gch981213@gmail.com>
3 Date: Sun, 20 Mar 2022 17:59:59 +0800
4 Subject: [PATCH 3/5] mtd: spinand: gigadevice: add support for GD5F1GQ5RExxG
6 This chip is the 1.8v version of GD5F1GQ5UExxG.
8 Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
9 Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
10 Link: https://lore.kernel.org/linux-mtd/20220320100001.247905-4-gch981213@gmail.com
12 drivers/mtd/nand/spi/gigadevice.c | 10 ++++++++++
13 1 file changed, 10 insertions(+)
15 diff --git a/drivers/mtd/nand/spi/gigadevice.c b/drivers/mtd/nand/spi/gigadevice.c
16 index 85a61d3d8467..d519bb85f0e7 100644
17 --- a/drivers/mtd/nand/spi/gigadevice.c
18 +++ b/drivers/mtd/nand/spi/gigadevice.c
19 @@ -383,6 +383,16 @@ static const struct spinand_info gigadevice_spinand_table[] = {
21 SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout,
22 gd5fxgq5xexxg_ecc_get_status)),
23 + SPINAND_INFO("GD5F1GQ5RExxG",
24 + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x41),
25 + NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
26 + NAND_ECCREQ(4, 512),
27 + SPINAND_INFO_OP_VARIANTS(&read_cache_variants_1gq5,
28 + &write_cache_variants,
29 + &update_cache_variants),
31 + SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout,
32 + gd5fxgq5xexxg_ecc_get_status)),
35 static const struct spinand_manufacturer_ops gigadevice_spinand_manuf_ops = {