1 From ecb6e1e5f4352055a5761b945a833a925d51bf8d Mon Sep 17 00:00:00 2001
2 From: Abhishek Sahu <absahu@codeaurora.org>
3 Date: Mon, 12 Mar 2018 18:44:58 +0530
4 Subject: [PATCH 09/13] i2c: qup: change completion timeout according to
7 Currently the completion timeout is being taken according to
8 maximum transfer length which is too high if SCL is operating in
9 high frequency. This patch calculates timeout on the basis of
10 one-byte transfer time and uses the same for completion timeout.
12 Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
13 Reviewed-by: Andy Gross <andy.gross@linaro.org>
14 Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
16 drivers/i2c/busses/i2c-qup.c | 13 ++++++++++---
17 1 file changed, 10 insertions(+), 3 deletions(-)
19 --- a/drivers/i2c/busses/i2c-qup.c
20 +++ b/drivers/i2c/busses/i2c-qup.c
22 #define MX_TX_RX_LEN SZ_64K
23 #define MX_BLOCKS (MX_TX_RX_LEN / QUP_READ_LIMIT)
25 -/* Max timeout in ms for 32k bytes */
28 + * Minimum transfer timeout for i2c transfers in seconds. It will be added on
29 + * the top of maximum transfer time calculated from i2c bus speed to compensate
34 /* Default values. Use these if FW query fails */
35 #define DEFAULT_CLK_FREQ 100000
36 @@ -163,6 +167,7 @@ struct qup_i2c_dev {
39 unsigned long one_byte_t;
40 + unsigned long xfer_timeout;
41 struct qup_i2c_block blk;
44 @@ -849,7 +854,7 @@ static int qup_i2c_bam_do_xfer(struct qu
45 dma_async_issue_pending(qup->brx.dma);
48 - if (!wait_for_completion_timeout(&qup->xfer, TOUT_MAX * HZ)) {
49 + if (!wait_for_completion_timeout(&qup->xfer, qup->xfer_timeout)) {
50 dev_err(qup->dev, "normal trans timed out\n");
53 @@ -1605,6 +1610,8 @@ nodma:
55 one_bit_t = (USEC_PER_SEC / clk_freq) + 1;
56 qup->one_byte_t = one_bit_t * 9;
57 + qup->xfer_timeout = TOUT_MIN * HZ +
58 + usecs_to_jiffies(MX_TX_RX_LEN * qup->one_byte_t);
60 dev_dbg(qup->dev, "IN:block:%d, fifo:%d, OUT:block:%d, fifo:%d\n",
61 qup->in_blk_sz, qup->in_fifo_sz,