c8823ac545ce4a4e256ef24a54e80322d0d26c67
[openwrt/staging/linusw.git] /
1 From d9a52701f6677889cc3332ab7a888f35cd69cc76 Mon Sep 17 00:00:00 2001
2 From: Weijie Gao <weijie.gao@mediatek.com>
3 Date: Wed, 19 Jul 2023 17:16:59 +0800
4 Subject: [PATCH 17/29] net: mediatek: optimize the switch reset delay wait
5 time
6
7 Not all switches requires 1 second delay after deasserting reset.
8 MT7531 requires only maximum 200ms.
9
10 This patch defines dedicated reset wait time for each switch chip, and will
11 significantly improve the boot time for boards using MT7531.
12
13 Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
14 ---
15 drivers/net/mtk_eth.c | 7 +++++--
16 1 file changed, 5 insertions(+), 2 deletions(-)
17
18 --- a/drivers/net/mtk_eth.c
19 +++ b/drivers/net/mtk_eth.c
20 @@ -127,6 +127,7 @@ struct mtk_eth_priv {
21 u32 mt753x_smi_addr;
22 u32 mt753x_phy_base;
23 u32 mt753x_pmcr;
24 + u32 mt753x_reset_wait_time;
25
26 struct gpio_desc rst_gpio;
27 int mcm;
28 @@ -943,12 +944,12 @@ int mt753x_switch_init(struct mtk_eth_pr
29 reset_assert(&priv->rst_mcm);
30 udelay(1000);
31 reset_deassert(&priv->rst_mcm);
32 - mdelay(1000);
33 + mdelay(priv->mt753x_reset_wait_time);
34 } else if (dm_gpio_is_valid(&priv->rst_gpio)) {
35 dm_gpio_set_value(&priv->rst_gpio, 0);
36 udelay(1000);
37 dm_gpio_set_value(&priv->rst_gpio, 1);
38 - mdelay(1000);
39 + mdelay(priv->mt753x_reset_wait_time);
40 }
41
42 ret = priv->switch_init(priv);
43 @@ -1528,11 +1529,13 @@ static int mtk_eth_of_to_plat(struct ude
44 priv->switch_init = mt7530_setup;
45 priv->switch_mac_control = mt7530_mac_control;
46 priv->mt753x_smi_addr = MT753X_DFL_SMI_ADDR;
47 + priv->mt753x_reset_wait_time = 1000;
48 } else if (!strcmp(str, "mt7531")) {
49 priv->sw = SW_MT7531;
50 priv->switch_init = mt7531_setup;
51 priv->switch_mac_control = mt7531_mac_control;
52 priv->mt753x_smi_addr = MT753X_DFL_SMI_ADDR;
53 + priv->mt753x_reset_wait_time = 200;
54 } else {
55 printf("error: unsupported switch\n");
56 return -EINVAL;