git.openwrt.org Git - openwrt/staging/ansuel.git/blob

   1 From b5f843fe7ece2b75a783fa785d6c7c6647a7a46d Mon Sep 17 00:00:00 2001
   2 From: Michiiel <94533767+Michiiel@users.noreply.github.com>
   3 Date: Thu, 30 May 2024 15:43:21 +0200
   4 Subject: [PATCH 1109/1135] =?UTF-8?q?fix=20Hsync=20and=20Vsync=20polarity?=
   5  =?UTF-8?q?=20can't=20change=20from=20negatieve=20to=20positief=20?=
   6  =?UTF-8?q?=E2=80=A6=20(#6193)?=
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  10
  11 vc4/hdmi: Fix Hsync and Vsync polarity changes
  12
  13 Polarity bits were only ever set and never cleared.
  14 Make sure they can also be cleared.
  15
  16 Signed-off-by: Michiel Vanbiervliet <michiel.vanbiervliet@gmail.com>
  17 ---
  18  drivers/gpu/drm/vc4/vc4_hdmi.c | 17 +++++++++--------
  19  1 file changed, 9 insertions(+), 8 deletions(-)
  20
  21 --- a/drivers/gpu/drm/vc4/vc4_hdmi.c
  22 +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
  23 @@ -1883,14 +1883,15 @@ static void vc4_hdmi_encoder_post_crtc_e
  24         spin_lock_irqsave(&vc4_hdmi->hw_lock, flags);
  25
  26         HDMI_WRITE(HDMI_VID_CTL,
  27 -                  HDMI_READ(HDMI_VID_CTL) |
  28 -                  VC4_HD_VID_CTL_ENABLE |
  29 -                  VC4_HD_VID_CTL_CLRRGB |
  30 -                  VC4_HD_VID_CTL_UNDERFLOW_ENABLE |
  31 -                  VC4_HD_VID_CTL_FRAME_COUNTER_RESET |
  32 -                  VC4_HD_VID_CTL_BLANK_INSERT_EN |
  33 -                  (vsync_pos ? 0 : VC4_HD_VID_CTL_VSYNC_LOW) |
  34 -                  (hsync_pos ? 0 : VC4_HD_VID_CTL_HSYNC_LOW));
  35 +          (HDMI_READ(HDMI_VID_CTL) &~
  36 +          (VC4_HD_VID_CTL_VSYNC_LOW | VC4_HD_VID_CTL_HSYNC_LOW)) |
  37 +          VC4_HD_VID_CTL_ENABLE |
  38 +          VC4_HD_VID_CTL_CLRRGB |
  39 +          VC4_HD_VID_CTL_UNDERFLOW_ENABLE |
  40 +          VC4_HD_VID_CTL_FRAME_COUNTER_RESET |
  41 +          VC4_HD_VID_CTL_BLANK_INSERT_EN |
  42 +          (vsync_pos ? 0 : VC4_HD_VID_CTL_VSYNC_LOW) |
  43 +          (hsync_pos ? 0 : VC4_HD_VID_CTL_HSYNC_LOW));
  44
  45         HDMI_WRITE(HDMI_VID_CTL,
  46                    HDMI_READ(HDMI_VID_CTL) & ~VC4_HD_VID_CTL_BLANKPIX);