1 From 82853543057f78d8a331272b70bc3f1e8cb0cbf4 Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
3 Date: Mon, 14 Dec 2020 19:07:42 +0100
4 Subject: [PATCH] dt-bindings: power: document Broadcom's PMB binding
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
9 Broadcom's PMB is power controller used for disabling and enabling SoC
12 Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
13 Reviewed-by: Rob Herring <robh@kernel.org>
14 Acked-by: Florian Fainelli <f.fainelli@gmail.com>
15 Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
16 Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
18 .../bindings/power/brcm,bcm-pmb.yaml | 50 +++++++++++++++++++
19 include/dt-bindings/soc/bcm-pmb.h | 11 ++++
20 2 files changed, 61 insertions(+)
21 create mode 100644 Documentation/devicetree/bindings/power/brcm,bcm-pmb.yaml
22 create mode 100644 include/dt-bindings/soc/bcm-pmb.h
25 +++ b/Documentation/devicetree/bindings/power/brcm,bcm-pmb.yaml
27 +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
30 +$id: http://devicetree.org/schemas/power/brcm,bcm-pmb.yaml#
31 +$schema: http://devicetree.org/meta-schemas/core.yaml#
33 +title: Broadcom PMB (Power Management Bus) controller
35 +description: This document describes Broadcom's PMB controller. It supports
36 + powering various types of connected devices (e.g. PCIe, USB, SATA).
39 + - Rafał Miłecki <rafal@milecki.pl>
47 + description: register space of one or more buses
51 + $ref: /schemas/types.yaml#/definitions/flag
52 + description: Flag to use for block working in big endian mode.
54 + "#power-domain-cells":
55 + description: cell specifies device ID (see bcm-pmb.h)
60 + - "#power-domain-cells"
62 +additionalProperties: false
66 + #include <dt-bindings/soc/bcm-pmb.h>
68 + pmb: power-controller@802800e0 {
69 + compatible = "brcm,bcm4908-pmb";
70 + reg = <0x802800e0 0x40>;
71 + #power-domain-cells = <1>;
75 + power-domains = <&pmb BCM_PMB_PCIE0>;
78 +++ b/include/dt-bindings/soc/bcm-pmb.h
80 +/* SPDX-License-Identifier: GPL-2.0-or-later OR MIT */
82 +#ifndef __DT_BINDINGS_SOC_BCM_PMB_H
83 +#define __DT_BINDINGS_SOC_BCM_PMB_H
85 +#define BCM_PMB_PCIE0 0x01
86 +#define BCM_PMB_PCIE1 0x02
87 +#define BCM_PMB_PCIE2 0x03
88 +#define BCM_PMB_HOST_USB 0x04