projects / openwrt / staging / ansuel.git / blob
? search:


c3902bb9c5ff0dcaf010907a3205d067369fc0ab
[openwrt/staging/ansuel.git] /
1 From a1da54bcd664fc27169386db966575675ac3ccb0 Mon Sep 17 00:00:00 2001
2 From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
3 Date: Mon, 11 Apr 2022 10:46:01 +0100
4 Subject: [PATCH 02/13] net: dsa: mt7530: populate supported_interfaces and
5 mac_capabilities
6 MIME-Version: 1.0
7 Content-Type: text/plain; charset=UTF-8
8 Content-Transfer-Encoding: 8bit
9
10 Populate the supported interfaces and MAC capabilities for mt7530,
11 mt7531 and mt7621 DSA switches. Filling this in will enable phylink
12 to pre-check the PHY interface mode against the the supported
13 interfaces bitmap prior to calling the validate function, and will
14 eventually allow us to convert to using the generic validation.
15
16 Tested-by: Marek Behún <kabel@kernel.org>
17 Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
18 Signed-off-by: Paolo Abeni <pabeni@redhat.com>
19 ---
20 drivers/net/dsa/mt7530.c | 74 ++++++++++++++++++++++++++++++++++++++++
21 drivers/net/dsa/mt7530.h | 2 ++
22 2 files changed, 76 insertions(+)
23
24 --- a/drivers/net/dsa/mt7530.c
25 +++ b/drivers/net/dsa/mt7530.c
26 @@ -2499,6 +2499,32 @@ mt7531_setup(struct dsa_switch *ds)
27 return 0;
28 }
29
30 +static void mt7530_mac_port_get_caps(struct dsa_switch *ds, int port,
31 + struct phylink_config *config)
32 +{
33 + switch (port) {
34 + case 0 ... 4: /* Internal phy */
35 + __set_bit(PHY_INTERFACE_MODE_GMII,
36 + config->supported_interfaces);
37 + break;
38 +
39 + case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */
40 + phy_interface_set_rgmii(config->supported_interfaces);
41 + __set_bit(PHY_INTERFACE_MODE_MII,
42 + config->supported_interfaces);
43 + __set_bit(PHY_INTERFACE_MODE_GMII,
44 + config->supported_interfaces);
45 + break;
46 +
47 + case 6: /* 1st cpu port */
48 + __set_bit(PHY_INTERFACE_MODE_RGMII,
49 + config->supported_interfaces);
50 + __set_bit(PHY_INTERFACE_MODE_TRGMII,
51 + config->supported_interfaces);
52 + break;
53 + }
54 +}
55 +
56 static bool
57 mt7530_phy_mode_supported(struct dsa_switch *ds, int port,
58 const struct phylink_link_state *state)
59 @@ -2535,6 +2561,37 @@ static bool mt7531_is_rgmii_port(struct
60 return (port == 5) && (priv->p5_intf_sel != P5_INTF_SEL_GMAC5_SGMII);
61 }
62
63 +static void mt7531_mac_port_get_caps(struct dsa_switch *ds, int port,
64 + struct phylink_config *config)
65 +{
66 + struct mt7530_priv *priv = ds->priv;
67 +
68 + switch (port) {
69 + case 0 ... 4: /* Internal phy */
70 + __set_bit(PHY_INTERFACE_MODE_GMII,
71 + config->supported_interfaces);
72 + break;
73 +
74 + case 5: /* 2nd cpu port supports either rgmii or sgmii/8023z */
75 + if (mt7531_is_rgmii_port(priv, port)) {
76 + phy_interface_set_rgmii(config->supported_interfaces);
77 + break;
78 + }
79 + fallthrough;
80 +
81 + case 6: /* 1st cpu port supports sgmii/8023z only */
82 + __set_bit(PHY_INTERFACE_MODE_SGMII,
83 + config->supported_interfaces);
84 + __set_bit(PHY_INTERFACE_MODE_1000BASEX,
85 + config->supported_interfaces);
86 + __set_bit(PHY_INTERFACE_MODE_2500BASEX,
87 + config->supported_interfaces);
88 +
89 + config->mac_capabilities |= MAC_2500FD;
90 + break;
91 + }
92 +}
93 +
94 static bool
95 mt7531_phy_mode_supported(struct dsa_switch *ds, int port,
96 const struct phylink_link_state *state)
97 @@ -3011,6 +3068,18 @@ mt7531_cpu_port_config(struct dsa_switch
98 return 0;
99 }
100
101 +static void mt753x_phylink_get_caps(struct dsa_switch *ds, int port,
102 + struct phylink_config *config)
103 +{
104 + struct mt7530_priv *priv = ds->priv;
105 +
106 + /* This switch only supports full-duplex at 1Gbps */
107 + config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
108 + MAC_10 | MAC_100 | MAC_1000FD;
109 +
110 + priv->info->mac_port_get_caps(ds, port, config);
111 +}
112 +
113 static void
114 mt7530_mac_port_validate(struct dsa_switch *ds, int port,
115 unsigned long *supported)
116 @@ -3246,6 +3315,7 @@ static const struct dsa_switch_ops mt753
117 .port_vlan_del = mt7530_port_vlan_del,
118 .port_mirror_add = mt753x_port_mirror_add,
119 .port_mirror_del = mt753x_port_mirror_del,
120 + .phylink_get_caps = mt753x_phylink_get_caps,
121 .phylink_validate = mt753x_phylink_validate,
122 .phylink_mac_link_state = mt753x_phylink_mac_link_state,
123 .phylink_mac_config = mt753x_phylink_mac_config,
124 @@ -3263,6 +3333,7 @@ static const struct mt753x_info mt753x_t
125 .phy_read = mt7530_phy_read,
126 .phy_write = mt7530_phy_write,
127 .pad_setup = mt7530_pad_clk_setup,
128 + .mac_port_get_caps = mt7530_mac_port_get_caps,
129 .phy_mode_supported = mt7530_phy_mode_supported,
130 .mac_port_validate = mt7530_mac_port_validate,
131 .mac_port_get_state = mt7530_phylink_mac_link_state,
132 @@ -3274,6 +3345,7 @@ static const struct mt753x_info mt753x_t
133 .phy_read = mt7530_phy_read,
134 .phy_write = mt7530_phy_write,
135 .pad_setup = mt7530_pad_clk_setup,
136 + .mac_port_get_caps = mt7530_mac_port_get_caps,
137 .phy_mode_supported = mt7530_phy_mode_supported,
138 .mac_port_validate = mt7530_mac_port_validate,
139 .mac_port_get_state = mt7530_phylink_mac_link_state,
140 @@ -3286,6 +3358,7 @@ static const struct mt753x_info mt753x_t
141 .phy_write = mt7531_ind_phy_write,
142 .pad_setup = mt7531_pad_setup,
143 .cpu_port_config = mt7531_cpu_port_config,
144 + .mac_port_get_caps = mt7531_mac_port_get_caps,
145 .phy_mode_supported = mt7531_phy_mode_supported,
146 .mac_port_validate = mt7531_mac_port_validate,
147 .mac_port_get_state = mt7531_phylink_mac_link_state,
148 @@ -3348,6 +3421,7 @@ mt7530_probe(struct mdio_device *mdiodev
149 */
150 if (!priv->info->sw_setup || !priv->info->pad_setup ||
151 !priv->info->phy_read || !priv->info->phy_write ||
152 + !priv->info->mac_port_get_caps ||
153 !priv->info->phy_mode_supported ||
154 !priv->info->mac_port_validate ||
155 !priv->info->mac_port_get_state || !priv->info->mac_port_config)
156 --- a/drivers/net/dsa/mt7530.h
157 +++ b/drivers/net/dsa/mt7530.h
158 @@ -796,6 +796,8 @@ struct mt753x_info {
159 int (*phy_write)(struct mt7530_priv *priv, int port, int regnum, u16 val);
160 int (*pad_setup)(struct dsa_switch *ds, phy_interface_t interface);
161 int (*cpu_port_config)(struct dsa_switch *ds, int port);
162 + void (*mac_port_get_caps)(struct dsa_switch *ds, int port,
163 + struct phylink_config *config);
164 bool (*phy_mode_supported)(struct dsa_switch *ds, int port,
165 const struct phylink_link_state *state);
166 void (*mac_port_validate)(struct dsa_switch *ds, int port,
Staging tree of Christian Marangi