c29b35ba86a071e7250b8ebda74d56be03c60bdb
[openwrt/staging/neocturne.git] /
1 From b1e679aba75e5e137c70bc76169c34835ef0e474 Mon Sep 17 00:00:00 2001
2 From: Laurentiu Tudor <laurentiu.tudor@nxp.com>
3 Date: Tue, 24 Jul 2018 13:11:03 +0300
4 Subject: [PATCH] arm64: dts: ls104x: make dma-coherent global to the SoC
5
6 These SoCs are really completely dma coherent in their entirety so add
7 the dma-coherent property at the soc level in the device tree and drop
8 the instances where it's specifically added to a few select devices.
9
10 Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
11 ---
12 arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 5 +----
13 arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 1 +
14 2 files changed, 2 insertions(+), 4 deletions(-)
15
16 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
17 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
18 @@ -219,6 +219,7 @@
19 #size-cells = <2>;
20 ranges;
21 dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
22 + dma-coherent;
23
24 clockgen: clocking@1ee1000 {
25 compatible = "fsl,ls1043a-clockgen";
26 @@ -771,7 +772,6 @@
27 reg-names = "ahci", "sata-ecc";
28 interrupts = <0 69 0x4>;
29 clocks = <&clockgen 4 0>;
30 - dma-coherent;
31 };
32
33 msi1: msi-controller1@1571000 {
34 @@ -806,7 +806,6 @@
35 #address-cells = <3>;
36 #size-cells = <2>;
37 device_type = "pci";
38 - dma-coherent;
39 iommu-map = <0 &smmu 0 1>; /* update by bootloader */
40 num-viewport = <6>;
41 bus-range = <0x0 0xff>;
42 @@ -833,7 +832,6 @@
43 #address-cells = <3>;
44 #size-cells = <2>;
45 device_type = "pci";
46 - dma-coherent;
47 iommu-map = <0 &smmu 0 1>; /* update by bootloader */
48 num-viewport = <6>;
49 bus-range = <0x0 0xff>;
50 @@ -860,7 +858,6 @@
51 #address-cells = <3>;
52 #size-cells = <2>;
53 device_type = "pci";
54 - dma-coherent;
55 iommu-map = <0 &smmu 0 1>; /* update by bootloader */
56 num-viewport = <6>;
57 bus-range = <0x0 0xff>;
58 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
59 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
60 @@ -191,6 +191,7 @@
61 #size-cells = <2>;
62 ranges;
63 dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
64 + dma-coherent;
65
66 ddr: memory-controller@1080000 {
67 compatible = "fsl,qoriq-memory-controller";